Date: Fri, 13 May 2005 22:33:30 -0400 From: Garrett Wollman <wollman@csail.mit.edu> To: "Poul-Henning Kamp" <phk@phk.freebsd.dk> Cc: freebsd-security@FreeBSD.ORG Subject: Re: FreeBSD Security Advisory FreeBSD-SA-05:09.htt [REVISED] Message-ID: <17029.25466.587442.577866@khavrinen.csail.mit.edu> In-Reply-To: <94145.1116037219@critter.freebsd.dk> References: <245f0df105051318564b1ffb6b@mail.gmail.com> <94145.1116037219@critter.freebsd.dk>
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<<On Sat, 14 May 2005 04:20:19 +0200, "Poul-Henning Kamp" <phk@phk.freebsd.dk> said: > The political problem is that if all operating systems do that, > Intel has a pretty dud feature on their hands, and they are not > particularly eager to accept that fact. Intel already had a pretty dud feature on their hands; just ask anyone in the architecture community (probably including those who work for Intel). Pentium 4 CPUs simply don't have enough I/O bandwidth to maintain two simultaneous, independent instruction streams. The value to the feature can't be realized until you have enough cache (in both size and bandwidth) to be able to partition it among logical CPUs in exactly the manner that Colin has suggested. (The fundamental problem in computer architecture for the past several years has been how to deal with the fact that gates are cheap and easy to make, but wires -- particularly external I/O wires -- are expensive and hard.) The only way to get full performance out of an HTT processor today is for both threads to be running out of L1 cache. Multimedia and numerical benchmarks are often parallelizable in this way (assuming the OS provides gang scheduling); general-purpose applications rarely are. -GAWollman
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