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Date:      Sat, 30 Nov 2013 22:16:38 +0000 (UTC)
From:      Eitan Adler <eadler@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r258779 - in head/sys/dev: cesa drm drm2/i915 drm2/radeon hatm
Message-ID:  <201311302216.rAUMGcPA037268@svn.freebsd.org>

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Author: eadler
Date: Sat Nov 30 22:16:37 2013
New Revision: 258779
URL: http://svnweb.freebsd.org/changeset/base/258779

Log:
  Similar to the (1 << 31) case it is not defined to do (2 << 30).

Modified:
  head/sys/dev/cesa/cesa.h
  head/sys/dev/drm/radeon_drv.h
  head/sys/dev/drm2/i915/i915_reg.h
  head/sys/dev/drm2/radeon/r600_blit.c
  head/sys/dev/drm2/radeon/radeon_drv.h
  head/sys/dev/drm2/radeon/radeon_reg.h
  head/sys/dev/hatm/if_hatmreg.h

Modified: head/sys/dev/cesa/cesa.h
==============================================================================
--- head/sys/dev/cesa/cesa.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/cesa/cesa.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -297,8 +297,8 @@ struct cesa_chain_info {
 #define CESA_CSH_AES_KLEN_MASK		(3 << 24)
 
 #define CESA_CSHD_FRAG_FIRST		(1 << 30)
-#define CESA_CSHD_FRAG_LAST		(2 << 30)
-#define CESA_CSHD_FRAG_MIDDLE		(3 << 30)
+#define CESA_CSHD_FRAG_LAST		(2U << 30)
+#define CESA_CSHD_FRAG_MIDDLE		(3U << 30)
 
 /* CESA registers definitions */
 #define CESA_ICR			0xDE20

Modified: head/sys/dev/drm/radeon_drv.h
==============================================================================
--- head/sys/dev/drm/radeon_drv.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/drm/radeon_drv.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -807,8 +807,8 @@ extern int r600_cs_init(struct drm_devic
 #define RADEON_DST_PITCH_OFFSET_C	0x1c80
 #	define RADEON_DST_TILE_LINEAR		(0 << 30)
 #	define RADEON_DST_TILE_MACRO		(1 << 30)
-#	define RADEON_DST_TILE_MICRO		(2 << 30)
-#	define RADEON_DST_TILE_BOTH		(3 << 30)
+#	define RADEON_DST_TILE_MICRO		(2U << 30)
+#	define RADEON_DST_TILE_BOTH		(3U << 30)
 
 #define RADEON_SCRATCH_REG0		0x15e0
 #define RADEON_SCRATCH_REG1		0x15e4

Modified: head/sys/dev/drm2/i915/i915_reg.h
==============================================================================
--- head/sys/dev/drm2/i915/i915_reg.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/drm2/i915/i915_reg.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -3611,8 +3611,8 @@ __FBSDID("$FreeBSD$");
 #define  PANEL_PORT_SELECT_LVDS	(0 << 30)
 #define  PANEL_PORT_SELECT_DPA	(1 << 30)
 #define  EDP_PANEL		(1 << 30)
-#define  PANEL_PORT_SELECT_DPC	(2 << 30)
-#define  PANEL_PORT_SELECT_DPD	(3 << 30)
+#define  PANEL_PORT_SELECT_DPC	(2U << 30)
+#define  PANEL_PORT_SELECT_DPD	(3U << 30)
 #define  PANEL_POWER_UP_DELAY_MASK	(0x1fff0000)
 #define  PANEL_POWER_UP_DELAY_SHIFT	16
 #define  PANEL_LIGHT_ON_DELAY_MASK	(0x1fff)

Modified: head/sys/dev/drm2/radeon/r600_blit.c
==============================================================================
--- head/sys/dev/drm2/radeon/r600_blit.c	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/drm2/radeon/r600_blit.c	Sat Nov 30 22:16:37 2013	(r258779)
@@ -196,7 +196,7 @@ set_vtx_resource(drm_radeon_private_t *d
 
 	sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8));
 #ifdef __BIG_ENDIAN
-	sq_vtx_constant_word2 |= (2 << 30);
+	sq_vtx_constant_word2 |= (2U << 30);
 #endif
 
 	BEGIN_RING(9);

Modified: head/sys/dev/drm2/radeon/radeon_drv.h
==============================================================================
--- head/sys/dev/drm2/radeon/radeon_drv.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/drm2/radeon/radeon_drv.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -720,8 +720,8 @@ void radeon_unregister_atpx_handler(void
 #define RADEON_DST_PITCH_OFFSET_C	0x1c80
 #	define RADEON_DST_TILE_LINEAR		(0 << 30)
 #	define RADEON_DST_TILE_MACRO		(1 << 30)
-#	define RADEON_DST_TILE_MICRO		(2 << 30)
-#	define RADEON_DST_TILE_BOTH		(3 << 30)
+#	define RADEON_DST_TILE_MICRO		(2U << 30)
+#	define RADEON_DST_TILE_BOTH		(3U << 30)
 
 #define RADEON_SCRATCH_REG0		0x15e0
 #define RADEON_SCRATCH_REG1		0x15e4

Modified: head/sys/dev/drm2/radeon/radeon_reg.h
==============================================================================
--- head/sys/dev/drm2/radeon/radeon_reg.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/drm2/radeon/radeon_reg.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -854,8 +854,8 @@ __FBSDID("$FreeBSD$");
 #       define RADEON_PITCH_SHIFT           21
 #       define RADEON_DST_TILE_LINEAR       (0 << 30)
 #       define RADEON_DST_TILE_MACRO        (1 << 30)
-#       define RADEON_DST_TILE_MICRO        (2 << 30)
-#       define RADEON_DST_TILE_BOTH         (3 << 30)
+#       define RADEON_DST_TILE_MICRO        (2U << 30)
+#       define RADEON_DST_TILE_BOTH         (3U << 30)
 #define RADEON_DST_WIDTH                    0x140c
 #define RADEON_DST_WIDTH_HEIGHT             0x1598
 #define RADEON_DST_WIDTH_X                  0x1588

Modified: head/sys/dev/hatm/if_hatmreg.h
==============================================================================
--- head/sys/dev/hatm/if_hatmreg.h	Sat Nov 30 21:54:55 2013	(r258778)
+++ head/sys/dev/hatm/if_hatmreg.h	Sat Nov 30 22:16:37 2013	(r258779)
@@ -294,7 +294,7 @@
 
 #define HE_REGO_CON_DAT		0x807F8
 #define HE_REGO_CON_CTL		0x807FC
-#define HE_REGM_CON_MBOX	(2 << 30)
+#define HE_REGM_CON_MBOX	(2U << 30)
 #define HE_REGM_CON_TCM		(1 << 30)
 #define HE_REGM_CON_RCM		(0 << 30)
 #define HE_REGM_CON_WE		(1 << 29)



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