Date: Thu, 31 Oct 2013 03:12:48 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r257418 - head/sys/arm/freescale/imx Message-ID: <201310310312.r9V3CmXn079706@svn.freebsd.org>
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Author: ian Date: Thu Oct 31 03:12:48 2013 New Revision: 257418 URL: http://svnweb.freebsd.org/changeset/base/257418 Log: Don't iterate through the bits of the pending interrupt register if the whole register is zero. Most of the registers will be zero most of the time. Modified: head/sys/arm/freescale/imx/tzic.c Modified: head/sys/arm/freescale/imx/tzic.c ============================================================================== --- head/sys/arm/freescale/imx/tzic.c Thu Oct 31 02:35:00 2013 (r257417) +++ head/sys/arm/freescale/imx/tzic.c Thu Oct 31 03:12:48 2013 (r257418) @@ -163,7 +163,7 @@ arm_get_next_irq(int last_irq) for (i = 0; i < 4; i++) { pending = tzic_read_4(TZIC_PND(i)); - for (b = 0; b < 32; b++) + for (b = 0; pending != 0 && b < 32; b++) if (pending & (1 << b)) { return (i * 32 + b); }
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