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Date:      Sat, 1 Feb 2020 19:46:02 +0000 (UTC)
From:      Conrad Meyer <cem@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r357377 - in head/sys/x86: cpufreq include x86
Message-ID:  <202002011946.011Jk2lB021466@repo.freebsd.org>

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Author: cem
Date: Sat Feb  1 19:46:02 2020
New Revision: 357377
URL: https://svnweb.freebsd.org/changeset/base/357377

Log:
  x86: Add/amend some power-management comments/macros
  
  No functional change.

Modified:
  head/sys/x86/cpufreq/hwpstate_intel.c
  head/sys/x86/include/specialreg.h
  head/sys/x86/x86/identcpu.c

Modified: head/sys/x86/cpufreq/hwpstate_intel.c
==============================================================================
--- head/sys/x86/cpufreq/hwpstate_intel.c	Sat Feb  1 19:45:27 2020	(r357376)
+++ head/sys/x86/cpufreq/hwpstate_intel.c	Sat Feb  1 19:46:02 2020	(r357377)
@@ -329,6 +329,14 @@ set_autonomous_hwp(struct hwp_softc *sc)
 	/* XXX: Many MSRs aren't readable until feature is enabled */
 	ret = wrmsr_safe(MSR_IA32_PM_ENABLE, 1);
 	if (ret) {
+		/*
+		 * This is actually a package-level MSR, and only the first
+		 * write is not ignored.  So it is harmless to enable it across
+		 * all devices, and this allows us not to care especially in
+		 * which order cores (and packages) are probed.  This error
+		 * condition should not happen given we gate on the HWP CPUID
+		 * feature flag, if the Intel SDM is correct.
+		 */
 		device_printf(dev, "Failed to enable HWP for cpu%d (%d)\n",
 		    pc->pc_cpuid, ret);
 		goto out;
@@ -350,6 +358,10 @@ set_autonomous_hwp(struct hwp_softc *sc)
 		goto out;
 	}
 
+	/*
+	 * High and low are static; "guaranteed" is dynamic; and efficient is
+	 * also dynamic.
+	 */
 	sc->high = IA32_HWP_CAPABILITIES_HIGHEST_PERFORMANCE(caps);
 	sc->guaranteed = IA32_HWP_CAPABILITIES_GUARANTEED_PERFORMANCE(caps);
 	sc->efficient = IA32_HWP_CAPABILITIES_EFFICIENT_PERFORMANCE(caps);

Modified: head/sys/x86/include/specialreg.h
==============================================================================
--- head/sys/x86/include/specialreg.h	Sat Feb  1 19:45:27 2020	(r357376)
+++ head/sys/x86/include/specialreg.h	Sat Feb  1 19:46:02 2020	(r357377)
@@ -566,6 +566,7 @@
 #define	MSR_IA32_TEMPERATURE_TARGET	0x1a2
 #define	MSR_TURBO_RATIO_LIMIT	0x1ad
 #define	MSR_TURBO_RATIO_LIMIT1	0x1ae
+#define	MSR_IA32_ENERGY_PERF_BIAS	0x1b0
 #define	MSR_DEBUGCTLMSR		0x1d9
 #define	MSR_LASTBRANCHFROMIP	0x1db
 #define	MSR_LASTBRANCHTOIP	0x1dc

Modified: head/sys/x86/x86/identcpu.c
==============================================================================
--- head/sys/x86/x86/identcpu.c	Sat Feb  1 19:45:27 2020	(r357376)
+++ head/sys/x86/x86/identcpu.c	Sat Feb  1 19:46:02 2020	(r357377)
@@ -119,9 +119,9 @@ u_int	cpu_mon_min_size;	/* MONITOR minimum range size,
 u_int	cpu_mon_max_size;	/* MONITOR minimum range size, bytes */
 u_int	cpu_maxphyaddr;		/* Max phys addr width in bits */
 u_int	cpu_power_eax;		/* 06H: Power management leaf, %eax */
-u_int	cpu_power_ebx;		/* 06H: Power management leaf, %eax */
-u_int	cpu_power_ecx;		/* 06H: Power management leaf, %eax */
-u_int	cpu_power_edx;		/* 06H: Power management leaf, %eax */
+u_int	cpu_power_ebx;		/* 06H: Power management leaf, %ebx */
+u_int	cpu_power_ecx;		/* 06H: Power management leaf, %ecx */
+u_int	cpu_power_edx;		/* 06H: Power management leaf, %edx */
 char machine[] = MACHINE;
 
 SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD,



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