Date: Wed, 21 Jan 2015 02:57:55 +0000 (UTC) From: Nathan Whitehorn <nwhitehorn@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r277468 - head/sys/powerpc/aim Message-ID: <201501210257.t0L2vtuF002319@svn.freebsd.org>
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Author: nwhitehorn Date: Wed Jan 21 02:57:54 2015 New Revision: 277468 URL: https://svnweb.freebsd.org/changeset/base/277468 Log: On 64-bit PowerPC, use more native forms of the PPC 970 HID restore sequences, like are used to read the HIDs. This is both easier to read and avoids a miscompilation by GCC in certain circumstances. Also avoid double restoration of HID4 and HID5. MFC after: 2 weeks Modified: head/sys/powerpc/aim/mp_cpudep.c Modified: head/sys/powerpc/aim/mp_cpudep.c ============================================================================== --- head/sys/powerpc/aim/mp_cpudep.c Wed Jan 21 02:56:13 2015 (r277467) +++ head/sys/powerpc/aim/mp_cpudep.c Wed Jan 21 02:57:54 2015 (r277468) @@ -58,7 +58,9 @@ SYSINIT(cpu_save_config, SI_SUB_CPU, SI_ void cpudep_ap_early_bootstrap(void) { +#ifndef __powerpc64__ register_t reg; +#endif __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); powerpc_sync(); @@ -69,12 +71,17 @@ cpudep_ap_early_bootstrap(void) case IBM970MP: /* Restore HID4 and HID5, which are necessary for the MMU */ +#ifdef __powerpc64__ + mtspr(SPR_HID4, bsp_state[2]); powerpc_sync(); isync(); + mtspr(SPR_HID5, bsp_state[3]); powerpc_sync(); isync(); +#else __asm __volatile("ld %0, 16(%2); sync; isync; \ mtspr %1, %0; sync; isync;" : "=r"(reg) : "K"(SPR_HID4), "r"(bsp_state)); __asm __volatile("ld %0, 24(%2); sync; isync; \ mtspr %1, %0; sync; isync;" : "=r"(reg) : "K"(SPR_HID5), "r"(bsp_state)); +#endif powerpc_sync(); break; } @@ -292,9 +299,24 @@ cpudep_ap_setup() /* * The 970 has strange rules about how to update HID registers. * See Table 2-3, 970MP manual + * + * Note: HID4 and HID5 restored already in + * cpudep_ap_early_bootstrap() */ __asm __volatile("mtasr %0; sync" :: "r"(0)); + #ifdef __powerpc64__ + __asm __volatile(" \ + sync; isync; \ + mtspr %1, %0; \ + mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ + mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; \ + sync; isync" + :: "r"(bsp_state[0]), "K"(SPR_HID0)); + __asm __volatile("sync; isync; \ + mtspr %1, %0; mtspr %1, %0; sync; isync" + :: "r"(bsp_state[1]), "K"(SPR_HID1)); + #else __asm __volatile(" \ ld %0,0(%2); \ sync; isync; \ @@ -306,12 +328,7 @@ cpudep_ap_setup() __asm __volatile("ld %0, 8(%2); sync; isync; \ mtspr %1, %0; mtspr %1, %0; sync; isync" : "=r"(reg) : "K"(SPR_HID1), "r"(bsp_state)); - __asm __volatile("ld %0, 16(%2); sync; isync; \ - mtspr %1, %0; sync; isync;" - : "=r"(reg) : "K"(SPR_HID4), "r"(bsp_state)); - __asm __volatile("ld %0, 24(%2); sync; isync; \ - mtspr %1, %0; sync; isync;" - : "=r"(reg) : "K"(SPR_HID5), "r"(bsp_state)); + #endif powerpc_sync(); break;
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