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Date:      Sat, 18 Jul 2026 00:13:17 +0000
From:      Jessica Clarke <jrtc27@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org
Subject:   git: 123dfd378959 - main - arm64/vmm: Fix vgic_v3 dropping EOI for disabled IRQs
Message-ID:  <6a5ac51d.3f282.780c67b5@gitrepo.freebsd.org>

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The branch main has been updated by jrtc27:

URL: https://cgit.FreeBSD.org/src/commit/?id=123dfd378959aecc97cfc1d9b457453194d6f25b

commit 123dfd378959aecc97cfc1d9b457453194d6f25b
Author:     Jessica Clarke <jrtc27@FreeBSD.org>
AuthorDate: 2026-07-17 23:57:15 +0000
Commit:     Jessica Clarke <jrtc27@FreeBSD.org>
CommitDate: 2026-07-17 23:57:15 +0000

    arm64/vmm: Fix vgic_v3 dropping EOI for disabled IRQs
    
    Now that IRQs can properly be disabled by GICD_ICENABLERn, an EOI for a
    disabled IRQ ends up being lost, since we don't assign it to a list
    register and don't enable maintenance interrupts for such cases. As a
    result, we keep the IRQ active, which stops it from ever being delivered
    again (which would be true even if we supported the active and pending
    state). Keep disabled but active IRQs around in list registers so we can
    see the EOI having taken place in a future sync (noting that since we
    already don't create list registers in active and pending state there
    are no concerns with causing a disabled IRQ to be delivered).
    
    Fixes:          47e073941f4e ("Import the kernel parts of bhyve/arm64")
    MFC after:      1 week
---
 sys/arm64/vmm/io/vgic_v3.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/sys/arm64/vmm/io/vgic_v3.c b/sys/arm64/vmm/io/vgic_v3.c
index ee96cc975755..09d1448c1803 100644
--- a/sys/arm64/vmm/io/vgic_v3.c
+++ b/sys/arm64/vmm/io/vgic_v3.c
@@ -2136,7 +2136,13 @@ vgic_v3_flush_hwstate(device_t dev, struct hypctx *hypctx)
 		if (i == hypctx->vgic_v3.ich_lr_num)
 			break;
 
-		if (!irq->enabled)
+		/*
+		 * NB: Disabled active interrupts are kept around for EOI to
+		 * make them inactive, since we don't enable maintenace
+		 * interrupts to intercept EOIs for interrupts not in a list
+		 * register.
+		 */
+		if (!irq->enabled && !irq->active)
 			continue;
 
 		hypctx_write_sys_reg(hypctx, HOST_ICH_LR_EL2(i),


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