Date: Tue, 18 Oct 2005 12:47:22 -0700 From: Nate Lawson <nate@root.org> To: Andre Oppermann <andre@freebsd.org> Cc: cvs-src@freebsd.org, Poul-Henning Kamp <phk@phk.freebsd.dk>, src-committers@freebsd.org, Andrew Gallatin <gallatin@cs.duke.edu>, cvs-all@freebsd.org Subject: Re: cvs commit: src/sys/amd64/amd64 cpu_switch.S machdep.c Message-ID: <4355514A.5000703@root.org> In-Reply-To: <435543AD.283EC0D@freebsd.org> References: <69576.1129658248@critter.freebsd.dk> <435543AD.283EC0D@freebsd.org>
next in thread | previous in thread | raw e-mail | index | archive | help
Andre Oppermann wrote: > Poul-Henning Kamp wrote: > >>In message <435527DD.3040007@root.org>, Nate Lawson writes: >> >> >>>I have good information that in the near future, most designs will have >>>guaranteed synchronized TSC across all CPUs. >> >>...and when those chips arrive, we can hopefully identify them by some >>bit in some MSR and then we can use the TSC on them. >> >>This is a good move and it is only too bad that it's taken the chip >>manufacturers 10 years to figure this out. > > > Considering that Nate knows about it and that it took cpu manufacturers > so I suspect they did it to make some DRM schemes work. Nah, ACPI tables on new machines tend to give info about what major OS vendors will soon support. -- Nate
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?4355514A.5000703>