Date: Fri, 13 Mar 2026 23:31:34 +0000 From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: eb0a78f6cef0 - main - x86 FRED: add CPUID, MSR, and CR4 bits Message-ID: <69b49e56.2116f.1c52bb7c@gitrepo.freebsd.org>
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The branch main has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=eb0a78f6cef0c2924b565d7c297cb08bb4de7cb0 commit eb0a78f6cef0c2924b565d7c297cb08bb4de7cb0 Author: Konstantin Belousov <kib@FreeBSD.org> AuthorDate: 2026-02-07 10:22:22 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2026-03-13 23:30:27 +0000 x86 FRED: add CPUID, MSR, and CR4 bits Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 1 week Differential revision: https://reviews.freebsd.org/D55810 --- sys/x86/include/specialreg.h | 23 +++++++++++++++++++++++ sys/x86/x86/identcpu.c | 11 +++++++---- 2 files changed, 30 insertions(+), 4 deletions(-) diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 3e5f598cd82a..4eb4f2c398b2 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -91,6 +91,7 @@ #define CR4_LASS 0x08000000 /* Linear Address Space Separation */ #define CR4_LAM_SUP 0x10000000 /* Linear-Address Masking for Supervisor */ +#define CR4_FRED 0x100000000ull /* FRED */ /* * Bits in AMD64 special registers. EFER is 64 bits wide. @@ -549,6 +550,10 @@ * CPUID instruction 7 Structured Extended Features, leaf 1 eax info */ #define CPUID_STDEXT4_LASS 0x00000040 +#define CPUID_STDEXT4_FRED 0x00020000 +#define CPUID_STDEXT4_LKGS 0x00040000 +#define CPUID_STDEXT4_WRMSRNS 0x00080000 +#define CPUID_STDEXT4_NMISRC 0x00100000 #define CPUID_STDEXT4_LAM 0x04000000 /* CPUID_HYBRID_ID leaf 0x1a */ @@ -644,6 +649,15 @@ #define MSR_IA32_ENERGY_PERF_BIAS 0x1b0 #define MSR_IA32_PKG_THERM_STATUS 0x1b1 #define MSR_IA32_PKG_THERM_INTERRUPT 0x1b2 +#define MSR_FRED_RSP0 0x1cc +#define MSR_FRED_RSP1 0x1cd +#define MSR_FRED_RSP2 0x1ce +#define MSR_FRED_RSP3 0x1cf +#define MSR_FRED_STKLVLS 0x1d0 +#define MSR_FRED_SSP1 0x1d1 +#define MSR_FRED_SSP2 0x1d2 +#define MSR_FRED_SSP3 0x1d3 +#define MSR_FRED_CONFIG 0x1d4 #define MSR_DEBUGCTLMSR 0x1d9 #define MSR_LASTBRANCHFROMIP 0x1db #define MSR_LASTBRANCHTOIP 0x1dc @@ -925,6 +939,15 @@ /* MSR IA32_PKG_THERM_INTERRUPT */ #define IA32_PKG_THERM_INTERRUPT_HFI_ENABLE (0x1ULL << 25) +/* MSR IA32_FRED_CONFIG */ +#define IA32_FRED_CONFIG_CSL_MASK 0x00000003 +#define IA32_FRED_CONFIG_DECR_SSP 0x00000008 +#define IA32_FRED_CONFIG_REDZONESZ_MASK 0x000000e0 +#define IA32_FRED_CONFIG_REDZONESZ_SHIFT 6 +#define IA32_FRED_CONFIG_REDZONESZ_MULT 64 +#define IA32_FRED_CONFIG_EXTINT_SLC_MASK 0x00000600 +#define IA32_FRED_CONFIG_EXTINT_SLC_SHIFT 9 + /* * PAT modes. */ diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index 7661c82f4394..7e0ccc72f7bb 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -1046,16 +1046,19 @@ printcpuinfo(void) "\040SSBD" ); } -#define STDEXT4_MASK (CPUID_STDEXT4_LASS | CPUID_STDEXT4_LAM) - if ((cpu_stdext_feature4 & STDEXT4_MASK) != 0) { + + if (cpu_stdext_feature4 != 0) { printf("\n Structured Extended Features4=0x%b", - cpu_stdext_feature4 & STDEXT4_MASK, + cpu_stdext_feature4, "\020" "\007LASS" + "\022FRED" + "\023LKGS" + "\024WRMSRNS" + "\025NMISRC" "\033LAM" ); } -#undef STDEXT4_MASK if ((cpu_feature2 & CPUID2_XSAVE) != 0) { cpuid_count(0xd, 0x1, regs);home | help
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