Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 4 Jun 2011 03:22:17 +0000 (UTC)
From:      Nathan Whitehorn <nwhitehorn@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r222666 - head/sys/powerpc/aim
Message-ID:  <201106040322.p543MHXs091626@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: nwhitehorn
Date: Sat Jun  4 03:22:16 2011
New Revision: 222666
URL: http://svn.freebsd.org/changeset/base/222666

Log:
  Fix a typo derived from a mismerge from mmu_oea that would cause
  pmap_sync_icache() to sync random (possibly uncached or nonexisting!)
  memory, causing kernel page faults or machine checks, most easily
  triggered by using GDB. While here, add an additional safeguard to only
  sync cacheable memory.
  
  MFC after:	2 days

Modified:
  head/sys/powerpc/aim/mmu_oea64.c

Modified: head/sys/powerpc/aim/mmu_oea64.c
==============================================================================
--- head/sys/powerpc/aim/mmu_oea64.c	Sat Jun  4 02:51:12 2011	(r222665)
+++ head/sys/powerpc/aim/mmu_oea64.c	Sat Jun  4 03:22:16 2011	(r222666)
@@ -2562,8 +2562,8 @@ moea64_sync_icache(mmu_t mmu, pmap_t pm,
 		lim = round_page(va);
 		len = MIN(lim - va, sz);
 		pvo = moea64_pvo_find_va(pm, va & ~ADDR_POFF);
-		if (pvo != NULL) {
-			pa = (pvo->pvo_pte.pte.pte_lo & LPTE_RPGN) |
+		if (pvo != NULL && !(pvo->pvo_pte.lpte.pte_lo & LPTE_I)) {
+			pa = (pvo->pvo_pte.lpte.pte_lo & LPTE_RPGN) |
 			    (va & ADDR_POFF);
 			moea64_syncicache(mmu, pm, va, pa, len);
 		}



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201106040322.p543MHXs091626>