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Date:      Thu, 3 Jan 2002 01:25:22 +0100
From:      Bernd Walter <ticso@cicely9.cicely.de>
To:        Michal Mertl <mime@traveller.cz>, Matthew Dillon <dillon@apollo.backplane.com>, Bruce Evans <bde@zeta.org.au>, Mike Smith <msmith@FreeBSD.ORG>, Bernd Walter <ticso@cicely8.cicely.de>, arch@FreeBSD.ORG
Subject:   Re: When to use atomic_ functions? (was: 64 bit counters)
Message-ID:  <20020103002521.GB53199@cicely9.cicely.de>
In-Reply-To: <20020103095701.B561@gsmx07.alcatel.com.au>
References:  <200201012349.g01NnKA40071@apollo.backplane.com> <Pine.BSF.4.41.0201021003580.18429-100000@prg.traveller.cz> <20020103095701.B561@gsmx07.alcatel.com.au>

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On Thu, Jan 03, 2002 at 09:57:02AM +1100, Peter Jeremy wrote:
> On 2002-Jan-02 15:53:55 +0100, Michal Mertl <mime@traveller.cz> wrote:
> >I don't know how much time will be wasted - my measurements on pII show
> >the atomic_ operations aren't that expensive.
> 
> As Matt has pointed out, this is only true if you have a single
> processor.  Atomic operations always translate into bus cycles - and
> the bus is roughly an order of magnitude slower than the CPU core for
> current CPUs.  The worst situation is where a common counter is
> updated by a random CPU - the counter will virtually always be in
> another CPU's cache, requiring multiple bus cycles to transfer the
> data.
> 
> Also, many RISC processors (eg Alpha) don't have locked read-modify-
> write primitives.  On the Alpha, you need an instruction sequence:
>   loop:	load_locked memory->register
> 	update register
> 	store_conditional register->memory
> 	if not success goto loop
> with a few memory barriers added to ensure that the load/store are
> visible to other CPUs.  The store_conditional will fail if your CPU
> was interrupted or if another CPU updated an implementation-defined
> region including the specified memory address.  (64-bit atomic
> operations on the IA32 use the same approach - using CMPXCHG8B as the
> store_conditional instruction).

My Alpha Architecture Handbook says that the barrier is unneeded.
I have no clue why they are there.

-- 
B.Walter              COSMO-Project         http://www.cosmo-project.de
ticso@cicely.de         Usergroup           info@cosmo-project.de


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