Date: Thu, 3 Dec 2015 07:24:59 +0000 (UTC) From: Andrew Rybchenko <arybchik@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r291679 - head/sys/dev/sfxge/common Message-ID: <201512030724.tB37OxEc001117@repo.freebsd.org>
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Author: arybchik Date: Thu Dec 3 07:24:59 2015 New Revision: 291679 URL: https://svnweb.freebsd.org/changeset/base/291679 Log: sfxge: add markers for autogenerated defines Move use defines outside. Submitted by: Guido Barzini <gbarzini at solarflare.com> Sponsored by: Solarflare Communications, Inc. MFC after: 2 days Modified: head/sys/dev/sfxge/common/efx_regs_ef10.h Modified: head/sys/dev/sfxge/common/efx_regs_ef10.h ============================================================================== --- head/sys/dev/sfxge/common/efx_regs_ef10.h Thu Dec 3 07:22:53 2015 (r291678) +++ head/sys/dev/sfxge/common/efx_regs_ef10.h Thu Dec 3 07:24:59 2015 (r291679) @@ -37,6 +37,14 @@ extern "C" { #endif +/************************************************************************** + * NOTE: the line below marks the start of the autogenerated section + * EF10 registers and descriptors + * + ************************************************************************** + */ + + /* * BIU_HW_REV_ID_REG(32bit): * @@ -182,30 +190,6 @@ extern "C" { #define ERF_DZ_TX_DESC_LWORD_LBN 0 #define ERF_DZ_TX_DESC_LWORD_WIDTH 32 -/* - * The workaround for bug 35388 requires multiplexing writes through - * the ERF_DZ_TX_DESC_WPTR address. - * TX_DESC_UPD: 0ppppppppppp (bit 11 lost) - * EVQ_RPTR: 1000hhhhhhhh, 1001llllllll (split into high and low bits) - * EVQ_TMR: 11mmvvvvvvvv (bits 8:13 of value lost) - */ -#define ER_DD_EVQ_INDIRECT_OFST (ER_DZ_TX_DESC_UPD_REG_OFST + 2 * 4) -#define ER_DD_EVQ_INDIRECT_STEP ER_DZ_TX_DESC_UPD_REG_STEP -#define ERF_DD_EVQ_IND_RPTR_FLAGS_LBN 8 -#define ERF_DD_EVQ_IND_RPTR_FLAGS_WIDTH 4 -#define EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH 8 -#define EFE_DD_EVQ_IND_RPTR_FLAGS_LOW 9 -#define ERF_DD_EVQ_IND_RPTR_LBN 0 -#define ERF_DD_EVQ_IND_RPTR_WIDTH 8 -#define ERF_DD_EVQ_IND_TIMER_FLAGS_LBN 10 -#define ERF_DD_EVQ_IND_TIMER_FLAGS_WIDTH 2 -#define EFE_DD_EVQ_IND_TIMER_FLAGS 3 -#define ERF_DD_EVQ_IND_TIMER_MODE_LBN 8 -#define ERF_DD_EVQ_IND_TIMER_MODE_WIDTH 2 -#define ERF_DD_EVQ_IND_TIMER_VAL_LBN 0 -#define ERF_DD_EVQ_IND_TIMER_VAL_WIDTH 8 - - /* ES_DRIVER_EV */ #define ESF_DZ_DRV_CODE_LBN 60 #define ESF_DZ_DRV_CODE_WIDTH 4 @@ -2935,6 +2919,35 @@ extern "C" { #define ESE_DZ_TO_PORT_B 0x2 #define ESE_DZ_TO_PORT_A 0x1 #define ESE_DZ_PM_IPI_NOOP 0x0 + +/************************************************************************* + * NOTE: the comment line above marks the end of the autogenerated section + */ + +/* + * The workaround for bug 35388 requires multiplexing writes through + * the ERF_DZ_TX_DESC_WPTR address. + * TX_DESC_UPD: 0ppppppppppp (bit 11 lost) + * EVQ_RPTR: 1000hhhhhhhh, 1001llllllll (split into high and low bits) + * EVQ_TMR: 11mmvvvvvvvv (bits 8:13 of value lost) + */ +#define ER_DD_EVQ_INDIRECT_OFST (ER_DZ_TX_DESC_UPD_REG_OFST + 2 * 4) +#define ER_DD_EVQ_INDIRECT_STEP ER_DZ_TX_DESC_UPD_REG_STEP +#define ERF_DD_EVQ_IND_RPTR_FLAGS_LBN 8 +#define ERF_DD_EVQ_IND_RPTR_FLAGS_WIDTH 4 +#define EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH 8 +#define EFE_DD_EVQ_IND_RPTR_FLAGS_LOW 9 +#define ERF_DD_EVQ_IND_RPTR_LBN 0 +#define ERF_DD_EVQ_IND_RPTR_WIDTH 8 +#define ERF_DD_EVQ_IND_TIMER_FLAGS_LBN 10 +#define ERF_DD_EVQ_IND_TIMER_FLAGS_WIDTH 2 +#define EFE_DD_EVQ_IND_TIMER_FLAGS 3 +#define ERF_DD_EVQ_IND_TIMER_MODE_LBN 8 +#define ERF_DD_EVQ_IND_TIMER_MODE_WIDTH 2 +#define ERF_DD_EVQ_IND_TIMER_VAL_LBN 0 +#define ERF_DD_EVQ_IND_TIMER_VAL_WIDTH 8 + + #ifdef __cplusplus } #endif
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