Date: Mon, 1 Mar 2004 00:53:12 -0800 (PST) From: Juli Mallett <jmallett@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 47906 for review Message-ID: <200403010853.i218rCU9089888@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=47906 Change 47906 by jmallett@jmallett_oingo on 2004/03/01 00:52:59 Do effectively nothing, but stop trying so hard. I have stuff to use a jump table, it neither helps nor hurts. Coming soon. Affected files ... .. //depot/projects/mips/sys/mips/mips/exception.S#14 edit Differences ... ==== //depot/projects/mips/sys/mips/mips/exception.S#14 (text+ko) ==== @@ -41,45 +41,6 @@ */ LEAF(ExceptionVector) .set noat - /* - * Interrupts are fast. Let everything else go through trap(). - */ - mfc0 k0, MIPS_COP_0_CAUSE - li k1, 31 << 2 - and k0, k1 - beq k0, zero, Interrupt - nop - - /* - * If all the bits were set, it's 31, it's VCED, so go there. - */ - bne k0, k1, 1f - nop - - j VCED - /* No BDSlot, save space by just pulling in the next insn. */ - -1: - /* - * Except stuff the TLB handler really wants. (TLB exceptions - * that are not TLBMod, that goes through trap() and into pmap.) - * This means that if this is one, or has bits outside of the - * three lowest set, we need to go ahead. Otherwise, switch to - * the TLB miss handler. - */ - li k1, 1 << 2 - beq k1, k0, 1f - nop - - li k1, ~(3 << 2) - and k1, k0 - bne k1, zero, 1f - nop - - j XTLBMissVector - nop - -1: dsubu sp, sp, TF_SIZE dla k0, 1f j exception_save_registers @@ -174,8 +135,8 @@ LEAF(XTLBMissVector) .set noat dmfc0 k0, MIPS_COP_0_BAD_VADDR - li k1, MIPS_XKSEG_START - subu k0, k1 + dli k1, MIPS_XKSEG_START + dsubu k0, k1 /* * Shift right logical to get a page index, but leaving * enough bits to index an array of 64 bit values, plus
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200403010853.i218rCU9089888>