Date: Mon, 29 Sep 2025 14:37:42 GMT From: Navdeep Parhar <np@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: c7b2e390de43 - main - cxgbe(4): hw/fw headers and shared code for the Terminator 7 ASIC Message-ID: <202509291437.58TEbgNd017561@gitrepo.freebsd.org>
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The branch main has been updated by np: URL: https://cgit.FreeBSD.org/src/commit/?id=c7b2e390de43bb2b1a5918a23310ec5464ee3787 commit c7b2e390de43bb2b1a5918a23310ec5464ee3787 Author: Navdeep Parhar <np@FreeBSD.org> AuthorDate: 2025-09-29 06:21:02 +0000 Commit: Navdeep Parhar <np@FreeBSD.org> CommitDate: 2025-09-29 14:25:58 +0000 cxgbe(4): hw/fw headers and shared code for the Terminator 7 ASIC This is the first of a series of commits that will add T7 support to cxgbe. The ASIC is gen5x16 on the PCIe side and has a 400Gbps MAC on the Ethernet side. NICs using the T7 will come in the following variants: * 1 x 400Gbps with QSFP-DD connector * 2 x 200/100/40Gbps with QSFP56/QSFP28/QSFP+ connectors * 4 x 50/25/10/1Gbps with SFP28/SFP+/SFP connectors There are 8 general purpose ARM A72 cores available on select SmartNIC/DPU boards. Obtained from: Chelsio Communications MFC after: 3 days Sponsored by: Chelsio Communications --- sys/conf/files | 24 + sys/dev/cxgbe/common/common.h | 177 +- sys/dev/cxgbe/common/t4_hw.c | 1949 +- sys/dev/cxgbe/common/t4_hw.h | 135 +- sys/dev/cxgbe/common/t4_msg.h | 3011 ++- sys/dev/cxgbe/common/t4_regs.h | 27273 ++++++++++++++++++++++++++-- sys/dev/cxgbe/common/t4_regs_values.h | 24 +- sys/dev/cxgbe/common/t4_tcb.h | 182 +- sys/dev/cxgbe/cudbg/cudbg_flash_utils.c | 90 +- sys/dev/cxgbe/cudbg/cudbg_lib.c | 10 +- sys/dev/cxgbe/cudbg/cudbg_lib_common.h | 7 +- sys/dev/cxgbe/firmware/t4fw_interface.h | 1320 +- sys/dev/cxgbe/firmware/t7fw_cfg.txt | 644 + sys/dev/cxgbe/firmware/t7fw_cfg_fpga.txt | 530 + sys/dev/cxgbe/firmware/t7fw_cfg_uwire.txt | 644 + sys/dev/cxgbe/t4_main.c | 16 +- sys/dev/cxgbe/t4_sge.c | 3 +- sys/dev/cxgbe/tom/t4_tls.c | 4 +- sys/modules/cxgbe/Makefile | 4 +- sys/modules/cxgbe/t7_firmware/Makefile | 23 + 20 files changed, 33901 insertions(+), 2169 deletions(-) diff --git a/sys/conf/files b/sys/conf/files index db05a1424f00..63bf5c3fd724 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -1519,6 +1519,30 @@ t6fw.fw optional cxgbe \ compile-with "${CP} ${.ALLSRC} ${.TARGET}" \ no-obj no-implicit-rule \ clean "t6fw.fw" +t7fw_cfg.c optional cxgbe \ + compile-with "${AWK} -f $S/tools/fw_stub.awk t7fw_cfg.fw:t7fw_cfg t7fw_cfg_uwire.fw:t7fw_cfg_uwire -mt7fw_cfg -c${.TARGET}" \ + no-ctfconvert no-implicit-rule before-depend local \ + clean "t7fw_cfg.c" +t7fw_cfg.fwo optional cxgbe \ + dependency "t7fw_cfg.fw" \ + compile-with "${NORMAL_FWO}" \ + no-implicit-rule \ + clean "t7fw_cfg.fwo" +t7fw_cfg.fw optional cxgbe \ + dependency "$S/dev/cxgbe/firmware/t7fw_cfg.txt" \ + compile-with "${CP} ${.ALLSRC} ${.TARGET}" \ + no-obj no-implicit-rule \ + clean "t7fw_cfg.fw" +t7fw_cfg_uwire.fwo optional cxgbe \ + dependency "t7fw_cfg_uwire.fw" \ + compile-with "${NORMAL_FWO}" \ + no-implicit-rule \ + clean "t7fw_cfg_uwire.fwo" +t7fw_cfg_uwire.fw optional cxgbe \ + dependency "$S/dev/cxgbe/firmware/t7fw_cfg_uwire.txt" \ + compile-with "${CP} ${.ALLSRC} ${.TARGET}" \ + no-obj no-implicit-rule \ + clean "t7fw_cfg_uwire.fw" dev/cxgbe/crypto/t4_crypto.c optional ccr \ compile-with "${NORMAL_C} -I$S/dev/cxgbe" dev/cyapa/cyapa.c optional cyapa iicbus diff --git a/sys/dev/cxgbe/common/common.h b/sys/dev/cxgbe/common/common.h index 6e80ce40648b..6b36832a7464 100644 --- a/sys/dev/cxgbe/common/common.h +++ b/sys/dev/cxgbe/common/common.h @@ -1,8 +1,7 @@ /*- * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (c) 2011 Chelsio Communications, Inc. - * All rights reserved. + * Copyright (c) 2011, 2025 Chelsio Communications. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -32,6 +31,15 @@ #include "t4_hw.h" +#define GLBL_INTR_MASK (F_CIM | F_MPS | F_PL | F_PCIE | F_MC0 | F_EDC0 | \ + F_EDC1 | F_LE | F_TP | F_MA | F_PM_TX | F_PM_RX | F_ULP_RX | \ + F_CPL_SWITCH | F_SGE | F_ULP_TX | F_SF) + +#define GLBL_T7_INTR_MASK (F_CIM | F_MPS | F_PL | F_T7_PCIE | F_T7_MC0 | \ + F_T7_EDC0 | F_T7_EDC1 | F_T7_LE | F_T7_TP | \ + F_T7_MA | F_T7_PM_TX | F_T7_PM_RX | F_T7_ULP_RX | \ + F_T7_CPL_SWITCH | F_T7_SGE | F_T7_ULP_TX | F_SF) + enum { MAX_NPORTS = 4, /* max # of ports */ SERNUM_LEN = 24, /* Serial # length */ @@ -77,6 +85,18 @@ enum { FEC_MODULE = 1 << 6, /* FEC suggested by the cable/transceiver. */ }; +enum { + ULP_T10DIF_ISCSI = 1 << 0, + ULP_T10DIF_FCOE = 1 << 1 +}; + +enum { + ULP_CRYPTO_LOOKASIDE = 1 << 0, + ULP_CRYPTO_INLINE_TLS = 1 << 1, + ULP_CRYPTO_INLINE_IPSEC = 1 << 2, + ULP_CRYPTO_OFLD_OVER_IPSEC_INLINE = 1 << 4 +}; + enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS }; struct port_stats { @@ -230,6 +250,15 @@ struct tp_cpl_stats { struct tp_rdma_stats { u32 rqe_dfr_pkt; u32 rqe_dfr_mod; + u32 pkts_in[MAX_NCHAN]; + u64 bytes_in[MAX_NCHAN]; + /* + * When reading rdma stats, the address difference b/w RDMA_IN and + * RDMA_OUT is 4*u32, to read both at once, added padding + */ + u32 padding[4]; + u32 pkts_out[MAX_NCHAN]; + u64 bytes_out[MAX_NCHAN]; }; struct sge_params { @@ -259,7 +288,10 @@ struct tp_params { uint32_t max_rx_pdu; uint32_t max_tx_pdu; bool rx_pkt_encap; + uint8_t lb_mode; + uint8_t lb_nchan; + int8_t ipsecidx_shift; int8_t fcoe_shift; int8_t port_shift; int8_t vnic_shift; @@ -270,6 +302,9 @@ struct tp_params { int8_t macmatch_shift; int8_t matchtype_shift; int8_t frag_shift; + int8_t roce_shift; + int8_t synonly_shift; + int8_t tcpflags_shift; }; /* Use same modulation queue as the tx channel. */ @@ -285,6 +320,22 @@ struct vpd_params { u8 md[MD_LEN + 1]; }; +/* + * Maximum resources provisioned for a PCI PF. + */ +struct pf_resources { + unsigned int nvi; /* N virtual interfaces */ + unsigned int neq; /* N egress Qs */ + unsigned int nethctrl; /* N egress ETH or CTRL Qs */ + unsigned int niqflint; /* N ingress Qs/w free list(s) & intr */ + unsigned int niq; /* N ingress Qs */ + unsigned int tc; /* PCI-E traffic class */ + unsigned int pmask; /* port access rights mask */ + unsigned int nexactf; /* N exact MPS filters */ + unsigned int r_caps; /* read capabilities */ + unsigned int wx_caps; /* write/execute capabilities */ +}; + struct pci_params { unsigned int vpd_cap_addr; unsigned int mps; @@ -308,8 +359,11 @@ struct chip_params { u8 pm_stats_cnt; u8 cng_ch_bits_log; /* congestion channel map bits width */ u8 nsched_cls; + u8 cim_num_ibq; u8 cim_num_obq; - u8 filter_opt_len; + u8 filter_opt_len; /* number of bits for optional fields */ + u8 filter_num_opt; /* number of optional fields */ + u8 sge_ctxt_size; u16 mps_rplc_size; u16 vfcount; u32 sge_fl_db; @@ -360,6 +414,7 @@ struct adapter_params { struct sge_params sge; struct tp_params tp; /* PF-only */ struct vpd_params vpd; + struct pf_resources pfres; /* PF-only */ struct pci_params pci; struct devlog_params devlog; /* PF-only */ struct rss_params rss; /* VF-only */ @@ -399,12 +454,13 @@ struct adapter_params { unsigned int ofldq_wr_cred; unsigned int eo_wr_cred; - unsigned int max_ordird_qp; - unsigned int max_ird_adapter; + unsigned int max_ordird_qp; /* Max read depth per RDMA QP */ + unsigned int max_ird_adapter; /* Max read depth per adapter */ /* These values are for all ports (8b/port, upto 4 ports) */ uint32_t mps_bg_map; /* MPS rx buffer group map */ uint32_t tp_ch_map; /* TPCHMAP from firmware */ + uint32_t tx_tp_ch_map; /* TX_TPCHMAP from firmware */ bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */ bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */ @@ -412,11 +468,15 @@ struct adapter_params { bool viid_smt_extn_support; /* FW returns vin, vfvld & smt index? */ unsigned int max_pkts_per_eth_tx_pkts_wr; uint8_t nsched_cls; /* # of usable sched classes per port */ + + uint8_t ncores; + uint32_t tid_qid_sel_mask; /* TID based QID selection mask */ }; #define CHELSIO_T4 0x4 #define CHELSIO_T5 0x5 #define CHELSIO_T6 0x6 +#define CHELSIO_T7 0x7 /* * State needed to monitor the forward progress of SGE Ingress DMA activities @@ -509,10 +569,11 @@ static inline int is_hashfilter(const struct adapter *adap) static inline int is_ktls(const struct adapter *adap) { - return adap->cryptocaps & FW_CAPS_CONFIG_TLS_HW; + return adap->cryptocaps & FW_CAPS_CONFIG_TLS_HW || + adap->params.chipid == CHELSIO_T7; } -static inline int chip_id(struct adapter *adap) +static inline int chip_id(const struct adapter *adap) { return adap->params.chipid; } @@ -537,6 +598,11 @@ static inline int is_t6(struct adapter *adap) return adap->params.chipid == CHELSIO_T6; } +static inline int is_t7(struct adapter *adap) +{ + return adap->params.chipid == CHELSIO_T7; +} + static inline int is_fpga(struct adapter *adap) { return adap->params.fpga; @@ -641,7 +707,7 @@ int t4_load_bootcfg(struct adapter *adapter, const u8 *cfg_data, unsigned int si int t4_load_boot(struct adapter *adap, u8 *boot_data, unsigned int boot_addr, unsigned int size); int t4_flash_erase_sectors(struct adapter *adapter, int start, int end); -int t4_flash_cfg_addr(struct adapter *adapter); +int t4_flash_cfg_addr(struct adapter *adapter, unsigned int *lenp); int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); int t4_get_fw_version(struct adapter *adapter, u32 *vers); int t4_get_fw_hdr(struct adapter *adapter, struct fw_hdr *hdr); @@ -655,9 +721,10 @@ int t4_init_hw(struct adapter *adapter, u32 fw_params); const struct chip_params *t4_get_chip_params(int chipid); int t4_prep_adapter(struct adapter *adapter, u32 *buf); int t4_shutdown_adapter(struct adapter *adapter); -int t4_init_devlog_params(struct adapter *adapter, int fw_attach); +int t4_init_devlog_ncores_params(struct adapter *adapter, int fw_attach); int t4_init_sge_params(struct adapter *adapter); int t4_init_tp_params(struct adapter *adap); +int t4_filter_field_width(const struct adapter *adap, int filter_field); int t4_filter_field_shift(const struct adapter *adap, int filter_sel); int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id); void t4_fatal_err(struct adapter *adapter, bool fw_error); @@ -665,6 +732,7 @@ int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, int filter_index, int enable); void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, int filter_index, int *enabled); +void t4_set_trace_rss_control(struct adapter *adap, u8 chan, u16 qid); int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, int start, int n, const u16 *rspq, unsigned int nrspq); int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, @@ -691,19 +759,60 @@ void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok); int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); -void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); -int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); -int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); -int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, - unsigned int *valp); -int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, - const unsigned int *valp); -int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, - unsigned int *valp); -int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); +void t4_pmrx_cache_get_stats(struct adapter *adap, u32 stats[]); +void t4_read_cimq_cfg_core(struct adapter *adap, u8 coreid, u16 *base, + u16 *size, u16 *thres); +int t4_read_cim_ibq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data, + size_t n); +int t4_read_cim_obq_core(struct adapter *adap, u8 coreid, u32 qid, u32 *data, + size_t n); +int t4_cim_read_core(struct adapter *adap, u8 group, u8 coreid, + unsigned int addr, unsigned int n, + unsigned int *valp); +int t4_cim_write_core(struct adapter *adap, u8 group, u8 coreid, + unsigned int addr, unsigned int n, + const unsigned int *valp); +int t4_cim_read_la_core(struct adapter *adap, u8 coreid, u32 *la_buf, + u32 *wrptr); void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); + +static inline void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, + u16 *thres) +{ + t4_read_cimq_cfg_core(adap, 0, base, size, thres); +} + +static inline int t4_read_cim_ibq(struct adapter *adap, u32 qid, u32 *data, + size_t n) +{ + return t4_read_cim_ibq_core(adap, 0, qid, data, n); +} + +static inline int t4_read_cim_obq(struct adapter *adap, u32 qid, u32 *data, + size_t n) +{ + return t4_read_cim_obq_core(adap, 0, qid, data, n); +} + +static inline int t4_cim_read(struct adapter *adap, unsigned int addr, + unsigned int n, unsigned int *valp) +{ + return t4_cim_read_core(adap, 0, 0, addr, n, valp); +} + +static inline int t4_cim_write(struct adapter *adap, unsigned int addr, + unsigned int n, unsigned int *valp) +{ + return t4_cim_write_core(adap, 0, 0, addr, n, valp); +} + +static inline int t4_cim_read_la(struct adapter *adap, u32 *la_buf, u32 *wrptr) +{ + return t4_cim_read_la_core(adap, 0, la_buf, wrptr); +} + int t4_get_flash_params(struct adapter *adapter); u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach); @@ -919,6 +1028,8 @@ int t4_configure_ringbb(struct adapter *adap); int t4_configure_add_smac(struct adapter *adap); int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf, u16 vlan); +int t4_flash_loc_start(struct adapter *adap, enum t4_flash_loc loc, + unsigned int *lenp); static inline int t4vf_query_params(struct adapter *adapter, unsigned int nparams, const u32 *params, @@ -969,8 +1080,8 @@ port_top_speed(const struct port_info *pi) sizeof(struct ulptx_idata) + sizeof(struct cpl_set_tcb_field_core)) static inline void * -mk_set_tcb_field_ulp(struct adapter *sc, void *cur, int tid, uint16_t word, - uint64_t mask, uint64_t val) +mk_set_tcb_field_ulp_with_rpl(struct adapter *sc, void *cur, int tid, + uint16_t word, uint64_t mask, uint64_t val, const int qid) { struct ulp_txpkt *ulpmc; struct ulptx_idata *ulpsc; @@ -989,8 +1100,21 @@ mk_set_tcb_field_ulp(struct adapter *sc, void *cur, int tid, uint16_t word, req = (struct cpl_set_tcb_field_core *)(ulpsc + 1); OPCODE_TID(req) = htobe32(MK_OPCODE_TID(CPL_SET_TCB_FIELD, tid)); - req->reply_ctrl = htobe16(F_NO_REPLY); - req->word_cookie = htobe16(V_WORD(word) | V_COOKIE(0)); + + if (qid == -1) { + req->reply_ctrl = htobe16(F_NO_REPLY); + req->word_cookie = htobe16(V_WORD(word) | V_COOKIE(0)); + } else { + if (chip_id(sc) >= CHELSIO_T7) { + req->reply_ctrl = htobe16(V_T7_QUEUENO(qid) | + V_T7_REPLY_CHAN(0) | V_NO_REPLY(0)); + } else { + req->reply_ctrl = htobe16(V_QUEUENO(qid) | + V_REPLY_CHAN(0) | V_NO_REPLY(0)); + } + req->word_cookie = htobe16(V_WORD(word) | + V_COOKIE(CPL_COOKIE_TOM)); + } req->mask = htobe64(mask); req->val = htobe64(val); @@ -1006,4 +1130,11 @@ mk_set_tcb_field_ulp(struct adapter *sc, void *cur, int tid, uint16_t word, return (ulpsc + 1); } + +static inline void * +mk_set_tcb_field_ulp(struct adapter *sc, void *cur, int tid, uint16_t word, + uint64_t mask, uint64_t val) +{ + return (mk_set_tcb_field_ulp_with_rpl(sc, cur, tid, word, mask, val, -1)); +} #endif /* __CHELSIO_COMMON_H */ diff --git a/sys/dev/cxgbe/common/t4_hw.c b/sys/dev/cxgbe/common/t4_hw.c index f90ad3010626..eb7ea9acc108 100644 --- a/sys/dev/cxgbe/common/t4_hw.c +++ b/sys/dev/cxgbe/common/t4_hw.c @@ -1,8 +1,7 @@ /*- * SPDX-License-Identifier: BSD-2-Clause * - * Copyright (c) 2012, 2016 Chelsio Communications, Inc. - * All rights reserved. + * Copyright (c) 2012, 2016, 2025 Chelsio Communications. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -246,6 +245,8 @@ struct port_tx_state { u32 t4_port_reg(struct adapter *adap, u8 port, u32 reg) { + if (chip_id(adap) > CHELSIO_T6) + return T7_PORT_REG(port, reg); if (chip_id(adap) > CHELSIO_T4) return T5_PORT_REG(port, reg); return PORT_REG(port, reg); @@ -268,8 +269,10 @@ read_tx_state(struct adapter *sc, struct port_tx_state *tx_state) { int i; - for_each_port(sc, i) - read_tx_state_one(sc, i, &tx_state[i]); + for (i = 0; i < MAX_NCHAN; i++) { + if (sc->chan_map[i] != 0xff) + read_tx_state_one(sc, i, &tx_state[i]); + } } static void @@ -279,7 +282,9 @@ check_tx_state(struct adapter *sc, struct port_tx_state *tx_state) uint64_t tx_frames, rx_pause; int i; - for_each_port(sc, i) { + for (i = 0; i < MAX_NCHAN; i++) { + if (sc->chan_map[i] == 0xff) + continue; rx_pause = tx_state[i].rx_pause; tx_frames = tx_state[i].tx_frames; read_tx_state_one(sc, i, &tx_state[i]); /* update */ @@ -351,7 +356,7 @@ int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd, return -EINVAL; if (adap->flags & IS_VF) { - if (is_t6(adap)) + if (chip_id(adap) >= CHELSIO_T6) data_reg = FW_T6VF_MBDATA_BASE_ADDR; else data_reg = FW_T4VF_MBDATA_BASE_ADDR; @@ -508,9 +513,8 @@ failed: int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, void *rpl, bool sleep_ok) { - return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, - sleep_ok, FW_CMD_MAX_TIMEOUT); - + return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, + sleep_ok, FW_CMD_MAX_TIMEOUT); } static int t4_edc_err_read(struct adapter *adap, int idx) @@ -799,6 +803,7 @@ unsigned int t4_get_regs_len(struct adapter *adapter) case CHELSIO_T5: case CHELSIO_T6: + case CHELSIO_T7: if (adapter->flags & IS_VF) return FW_T4VF_REGMAP_SIZE; return T5_REGMAP_SIZE; @@ -2639,6 +2644,638 @@ void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size) ((NUM_CIM_PF_MAILBOX_DATA_INSTANCES - 1) * 4), }; + static const unsigned int t7_reg_ranges[] = { + 0x1008, 0x101c, + 0x1024, 0x10a8, + 0x10b4, 0x10f8, + 0x1100, 0x1114, + 0x111c, 0x112c, + 0x1138, 0x113c, + 0x1144, 0x115c, + 0x1180, 0x1184, + 0x1190, 0x1194, + 0x11a0, 0x11a4, + 0x11b0, 0x11d0, + 0x11fc, 0x1278, + 0x1280, 0x1368, + 0x1700, 0x172c, + 0x173c, 0x1760, + 0x1800, 0x18fc, + 0x3000, 0x3044, + 0x3060, 0x3064, + 0x30a4, 0x30b0, + 0x30b8, 0x30d8, + 0x30e0, 0x30fc, + 0x3140, 0x357c, + 0x35a8, 0x35cc, + 0x35e0, 0x35ec, + 0x3600, 0x37fc, + 0x3804, 0x3818, + 0x3880, 0x388c, + 0x3900, 0x3904, + 0x3910, 0x3978, + 0x3980, 0x399c, + 0x4700, 0x4720, + 0x4728, 0x475c, + 0x480c, 0x4814, + 0x4890, 0x489c, + 0x48a4, 0x48ac, + 0x48b8, 0x48c4, + 0x4900, 0x4924, + 0x4ffc, 0x4ffc, + 0x5500, 0x5624, + 0x56c4, 0x56ec, + 0x56f4, 0x5720, + 0x5728, 0x575c, + 0x580c, 0x5814, + 0x5890, 0x589c, + 0x58a4, 0x58ac, + 0x58b8, 0x58bc, + 0x5940, 0x598c, + 0x59b0, 0x59c8, + 0x59d0, 0x59dc, + 0x59fc, 0x5a18, + 0x5a60, 0x5a6c, + 0x5a80, 0x5a8c, + 0x5a94, 0x5a9c, + 0x5b94, 0x5bfc, + 0x5c10, 0x5e48, + 0x5e50, 0x5e94, + 0x5ea0, 0x5eb0, + 0x5ec0, 0x5ec0, + 0x5ec8, 0x5ed0, + 0x5ee0, 0x5ee0, + 0x5ef0, 0x5ef0, + 0x5f00, 0x5f04, + 0x5f0c, 0x5f10, + 0x5f20, 0x5f88, + 0x5f90, 0x5fd8, + 0x6000, 0x6020, + 0x6028, 0x6030, + 0x6044, 0x609c, + 0x60a8, 0x60ac, + 0x60b8, 0x60ec, + 0x6100, 0x6104, + 0x6118, 0x611c, + 0x6150, 0x6150, + 0x6180, 0x61b8, + 0x7700, 0x77a8, + 0x77b0, 0x7888, + 0x78cc, 0x7970, + 0x7b00, 0x7b00, + 0x7b08, 0x7b0c, + 0x7b24, 0x7b84, + 0x7b8c, 0x7c2c, + 0x7c34, 0x7c40, + 0x7c48, 0x7c68, + 0x7c70, 0x7c7c, + 0x7d00, 0x7ddc, + 0x7de4, 0x7e38, + 0x7e40, 0x7e44, + 0x7e4c, 0x7e74, + 0x7e80, 0x7ee0, + 0x7ee8, 0x7f0c, + 0x7f20, 0x7f5c, + 0x8dc0, 0x8de8, + 0x8df8, 0x8e04, + 0x8e10, 0x8e30, + 0x8e7c, 0x8ee8, + 0x8f88, 0x8f88, + 0x8f90, 0x8fb0, + 0x8fb8, 0x9058, + 0x9074, 0x90f8, + 0x9100, 0x912c, + 0x9138, 0x9188, + 0x9400, 0x9414, + 0x9430, 0x9440, + 0x9454, 0x9454, + 0x945c, 0x947c, + 0x9498, 0x94b8, + 0x9600, 0x9600, + 0x9608, 0x9638, + 0x9640, 0x9704, + 0x9710, 0x971c, + 0x9800, 0x9804, + 0x9854, 0x9854, + 0x9c00, 0x9c6c, + 0x9c80, 0x9cec, + 0x9d00, 0x9d6c, + 0x9d80, 0x9dec, + 0x9e00, 0x9e6c, + 0x9e80, 0x9eec, + 0x9f00, 0x9f6c, + 0x9f80, 0x9fec, + 0xa000, 0xa06c, + 0xa080, 0xa0ec, + 0xa100, 0xa16c, + 0xa180, 0xa1ec, + 0xa200, 0xa26c, + 0xa280, 0xa2ec, + 0xa300, 0xa36c, + 0xa380, 0xa458, + 0xa460, 0xa4f8, + 0xd000, 0xd03c, + 0xd100, 0xd134, + 0xd200, 0xd214, + 0xd220, 0xd234, + 0xd240, 0xd254, + 0xd260, 0xd274, + 0xd280, 0xd294, + 0xd2a0, 0xd2b4, + 0xd2c0, 0xd2d4, + 0xd2e0, 0xd2f4, + 0xd300, 0xd31c, + 0xdfc0, 0xdfe0, + 0xe000, 0xe00c, + 0xf000, 0xf008, + 0xf010, 0xf06c, + 0x11000, 0x11014, + 0x11048, 0x11120, + 0x11130, 0x11144, + 0x11174, 0x11178, + 0x11190, 0x111a0, + 0x111e4, 0x112f0, + 0x11300, 0x1133c, + 0x11408, 0x1146c, + 0x12000, 0x12004, + 0x12060, 0x122c4, + 0x19040, 0x1906c, + 0x19078, 0x19080, + 0x1908c, 0x190e8, + 0x190f0, 0x190f8, + 0x19100, 0x19110, + 0x19120, 0x19124, + 0x19150, 0x19194, + 0x1919c, 0x191a0, + 0x191ac, 0x191c8, + 0x191d0, 0x191e4, + 0x19250, 0x19250, + 0x19258, 0x19268, + 0x19278, 0x19278, + 0x19280, 0x192b0, + 0x192bc, 0x192f0, + 0x19300, 0x19308, + 0x19310, 0x19318, + 0x19320, 0x19328, + 0x19330, 0x19330, + 0x19348, 0x1934c, + 0x193f8, 0x19428, + 0x19430, 0x19444, + 0x1944c, 0x1946c, + 0x19474, 0x1947c, + 0x19488, 0x194cc, + 0x194f0, 0x194f8, + 0x19c00, 0x19c48, + 0x19c50, 0x19c80, + 0x19c94, 0x19c98, + 0x19ca0, 0x19cdc, + 0x19ce4, 0x19cf8, + 0x19d00, 0x19d30, + 0x19d50, 0x19d80, + 0x19d94, 0x19d98, + 0x19da0, 0x19de0, + 0x19df0, 0x19e10, + 0x19e50, 0x19e6c, + 0x19ea0, 0x19ebc, + 0x19ec4, 0x19ef4, + 0x19f04, 0x19f2c, + 0x19f34, 0x19f34, + 0x19f40, 0x19f50, + 0x19f90, 0x19fb4, + 0x19fbc, 0x19fbc, + 0x19fc4, 0x19fc8, + 0x19fd0, 0x19fe4, + 0x1a000, 0x1a004, + 0x1a010, 0x1a06c, + 0x1a0b0, 0x1a0e4, + 0x1a0ec, 0x1a108, + 0x1a114, 0x1a130, + 0x1a138, 0x1a1c4, + 0x1a1fc, 0x1a29c, + 0x1a2a8, 0x1a2b8, + 0x1a2c0, 0x1a388, + 0x1a398, 0x1a3ac, + 0x1e008, 0x1e00c, + 0x1e040, 0x1e044, + 0x1e04c, 0x1e04c, + 0x1e284, 0x1e290, + 0x1e2c0, 0x1e2c0, + 0x1e2e0, 0x1e2e4, + 0x1e300, 0x1e384, + 0x1e3c0, 0x1e3c8, + 0x1e408, 0x1e40c, + 0x1e440, 0x1e444, + 0x1e44c, 0x1e44c, + 0x1e684, 0x1e690, + 0x1e6c0, 0x1e6c0, + 0x1e6e0, 0x1e6e4, + 0x1e700, 0x1e784, + 0x1e7c0, 0x1e7c8, + 0x1e808, 0x1e80c, + 0x1e840, 0x1e844, + 0x1e84c, 0x1e84c, + 0x1ea84, 0x1ea90, + 0x1eac0, 0x1eac0, + 0x1eae0, 0x1eae4, + 0x1eb00, 0x1eb84, + 0x1ebc0, 0x1ebc8, + 0x1ec08, 0x1ec0c, + 0x1ec40, 0x1ec44, + 0x1ec4c, 0x1ec4c, + 0x1ee84, 0x1ee90, + 0x1eec0, 0x1eec0, + 0x1eee0, 0x1eee4, + 0x1ef00, 0x1ef84, + 0x1efc0, 0x1efc8, + 0x1f008, 0x1f00c, + 0x1f040, 0x1f044, + 0x1f04c, 0x1f04c, + 0x1f284, 0x1f290, + 0x1f2c0, 0x1f2c0, + 0x1f2e0, 0x1f2e4, + 0x1f300, 0x1f384, + 0x1f3c0, 0x1f3c8, + 0x1f408, 0x1f40c, + 0x1f440, 0x1f444, + 0x1f44c, 0x1f44c, + 0x1f684, 0x1f690, + 0x1f6c0, 0x1f6c0, + 0x1f6e0, 0x1f6e4, + 0x1f700, 0x1f784, + 0x1f7c0, 0x1f7c8, + 0x1f808, 0x1f80c, + 0x1f840, 0x1f844, + 0x1f84c, 0x1f84c, + 0x1fa84, 0x1fa90, + 0x1fac0, 0x1fac0, + 0x1fae0, 0x1fae4, + 0x1fb00, 0x1fb84, + 0x1fbc0, 0x1fbc8, + 0x1fc08, 0x1fc0c, + 0x1fc40, 0x1fc44, + 0x1fc4c, 0x1fc4c, + 0x1fe84, 0x1fe90, + 0x1fec0, 0x1fec0, + 0x1fee0, 0x1fee4, + 0x1ff00, 0x1ff84, + 0x1ffc0, 0x1ffc8, + 0x30000, 0x30038, + 0x30100, 0x3017c, + 0x30190, 0x301a0, + 0x301a8, 0x301b8, + 0x301c4, 0x301c8, + 0x301d0, 0x301e0, + 0x30200, 0x30344, + 0x30400, 0x304b4, + 0x304c0, 0x3052c, + 0x30540, 0x3065c, + 0x30800, 0x30848, + 0x30850, 0x308a8, + 0x308b8, 0x308c0, + 0x308cc, 0x308dc, + 0x30900, 0x30904, + 0x3090c, 0x30914, + 0x3091c, 0x30928, + 0x30930, 0x3093c, + 0x30944, 0x30948, + 0x30954, 0x30974, + 0x3097c, 0x30980, + 0x30a00, 0x30a20, + 0x30a38, 0x30a3c, + 0x30a50, 0x30a50, + 0x30a80, 0x30a80, + 0x30a88, 0x30aa8, + 0x30ab0, 0x30ab4, + 0x30ac8, 0x30ad4, + 0x30b28, 0x30b84, + 0x30b98, 0x30bb8, + 0x30c98, 0x30d14, + 0x31000, 0x31020, + 0x31038, 0x3103c, + 0x31050, 0x31050, + 0x31080, 0x31080, + 0x31088, 0x310a8, + 0x310b0, 0x310b4, + 0x310c8, 0x310d4, + 0x31128, 0x31184, + 0x31198, 0x311b8, + 0x32000, 0x32038, + 0x32100, 0x3217c, + 0x32190, 0x321a0, + 0x321a8, 0x321b8, + 0x321c4, 0x321c8, + 0x321d0, 0x321e0, + 0x32200, 0x32344, + 0x32400, 0x324b4, + 0x324c0, 0x3252c, + 0x32540, 0x3265c, + 0x32800, 0x32848, + 0x32850, 0x328a8, + 0x328b8, 0x328c0, + 0x328cc, 0x328dc, + 0x32900, 0x32904, + 0x3290c, 0x32914, + 0x3291c, 0x32928, + 0x32930, 0x3293c, + 0x32944, 0x32948, + 0x32954, 0x32974, + 0x3297c, 0x32980, + 0x32a00, 0x32a20, + 0x32a38, 0x32a3c, + 0x32a50, 0x32a50, + 0x32a80, 0x32a80, + 0x32a88, 0x32aa8, + 0x32ab0, 0x32ab4, + 0x32ac8, 0x32ad4, + 0x32b28, 0x32b84, + 0x32b98, 0x32bb8, + 0x32c98, 0x32d14, + 0x33000, 0x33020, + 0x33038, 0x3303c, + 0x33050, 0x33050, + 0x33080, 0x33080, + 0x33088, 0x330a8, + 0x330b0, 0x330b4, + 0x330c8, 0x330d4, + 0x33128, 0x33184, + 0x33198, 0x331b8, + 0x34000, 0x34038, + 0x34100, 0x3417c, + 0x34190, 0x341a0, + 0x341a8, 0x341b8, + 0x341c4, 0x341c8, + 0x341d0, 0x341e0, + 0x34200, 0x34344, + 0x34400, 0x344b4, + 0x344c0, 0x3452c, + 0x34540, 0x3465c, + 0x34800, 0x34848, + 0x34850, 0x348a8, + 0x348b8, 0x348c0, + 0x348cc, 0x348dc, + 0x34900, 0x34904, + 0x3490c, 0x34914, + 0x3491c, 0x34928, + 0x34930, 0x3493c, + 0x34944, 0x34948, + 0x34954, 0x34974, + 0x3497c, 0x34980, + 0x34a00, 0x34a20, + 0x34a38, 0x34a3c, + 0x34a50, 0x34a50, + 0x34a80, 0x34a80, + 0x34a88, 0x34aa8, + 0x34ab0, 0x34ab4, + 0x34ac8, 0x34ad4, + 0x34b28, 0x34b84, + 0x34b98, 0x34bb8, + 0x34c98, 0x34d14, + 0x35000, 0x35020, + 0x35038, 0x3503c, + 0x35050, 0x35050, + 0x35080, 0x35080, + 0x35088, 0x350a8, + 0x350b0, 0x350b4, + 0x350c8, 0x350d4, + 0x35128, 0x35184, + 0x35198, 0x351b8, + 0x36000, 0x36038, + 0x36100, 0x3617c, + 0x36190, 0x361a0, + 0x361a8, 0x361b8, + 0x361c4, 0x361c8, + 0x361d0, 0x361e0, + 0x36200, 0x36344, + 0x36400, 0x364b4, + 0x364c0, 0x3652c, + 0x36540, 0x3665c, + 0x36800, 0x36848, + 0x36850, 0x368a8, + 0x368b8, 0x368c0, + 0x368cc, 0x368dc, + 0x36900, 0x36904, + 0x3690c, 0x36914, + 0x3691c, 0x36928, + 0x36930, 0x3693c, + 0x36944, 0x36948, + 0x36954, 0x36974, + 0x3697c, 0x36980, + 0x36a00, 0x36a20, + 0x36a38, 0x36a3c, + 0x36a50, 0x36a50, + 0x36a80, 0x36a80, + 0x36a88, 0x36aa8, + 0x36ab0, 0x36ab4, + 0x36ac8, 0x36ad4, + 0x36b28, 0x36b84, + 0x36b98, 0x36bb8, + 0x36c98, 0x36d14, + 0x37000, 0x37020, + 0x37038, 0x3703c, + 0x37050, 0x37050, + 0x37080, 0x37080, + 0x37088, 0x370a8, + 0x370b0, 0x370b4, + 0x370c8, 0x370d4, + 0x37128, 0x37184, + 0x37198, 0x371b8, + 0x38000, 0x380b0, + 0x380b8, 0x38130, + 0x38140, 0x38140, + 0x38150, 0x38154, + 0x38160, 0x381c4, + 0x381f0, 0x38204, + 0x3820c, 0x38214, + 0x3821c, 0x3822c, + 0x38244, 0x38244, + 0x38254, 0x38274, + 0x3827c, 0x38280, + 0x38300, 0x38304, + 0x3830c, 0x38314, + 0x3831c, 0x3832c, + 0x38344, 0x38344, + 0x38354, 0x38374, + 0x3837c, 0x38380, + 0x38400, 0x38424, + 0x38438, 0x3843c, + 0x38480, 0x38480, + 0x384a8, 0x384a8, + 0x384b0, 0x384b4, + 0x384c8, 0x38514, + 0x38600, 0x3860c, + 0x3861c, 0x38624, + 0x38900, 0x38924, + 0x38938, 0x3893c, + 0x38980, 0x38980, + 0x389a8, 0x389a8, + 0x389b0, 0x389b4, + 0x389c8, 0x38a14, + 0x38b00, 0x38b0c, + 0x38b1c, 0x38b24, + 0x38e00, 0x38e00, + 0x38e18, 0x38e20, + 0x38e38, 0x38e40, + 0x38e58, 0x38e60, + 0x38e78, 0x38e80, + 0x38e98, 0x38ea0, + 0x38eb8, 0x38ec0, + 0x38ed8, 0x38ee0, + 0x38ef8, 0x38f08, *** 40524 LINES SKIPPED ***
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