Date: Wed, 7 Aug 2013 17:07:42 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r254066 - stable/9/sys/amd64/include Message-ID: <201308071707.r77H7gIh004430@svn.freebsd.org>
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Author: kib Date: Wed Aug 7 17:07:42 2013 New Revision: 254066 URL: http://svnweb.freebsd.org/changeset/base/254066 Log: MFC r245055 (by neel): Add macros required to enable VMX operation on Intel processors. Modified: stable/9/sys/amd64/include/specialreg.h Directory Properties: stable/9/sys/ (props changed) Modified: stable/9/sys/amd64/include/specialreg.h ============================================================================== --- stable/9/sys/amd64/include/specialreg.h Wed Aug 7 16:36:38 2013 (r254065) +++ stable/9/sys/amd64/include/specialreg.h Wed Aug 7 17:07:42 2013 (r254066) @@ -68,6 +68,7 @@ #define CR4_PCE 0x00000100 /* Performance monitoring counter enable */ #define CR4_FXSR 0x00000200 /* Fast FPU save/restore used by OS */ #define CR4_XMM 0x00000400 /* enable SIMD/MMX2 to use except 16 */ +#define CR4_VMXE 0x00002000 /* enable VMX operation (Intel-specific) */ #define CR4_FSGSBASE 0x00010000 /* Enable FS/GS BASE accessing instructions */ #define CR4_PCIDE 0x00020000 /* Enable Context ID */ #define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ @@ -292,6 +293,7 @@ #define MSR_APICBASE 0x01b #define MSR_EBL_CR_POWERON 0x02a #define MSR_TEST_CTL 0x033 +#define MSR_IA32_FEATURE_CONTROL 0x03a #define MSR_BIOS_UPDT_TRIG 0x079 #define MSR_BBL_CR_D0 0x088 #define MSR_BBL_CR_D1 0x089
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