Date: Mon, 28 Apr 2003 10:24:31 -0700 (PDT) From: Juli Mallett <jmallett@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 29949 for review Message-ID: <200304281724.h3SHOVFI017666@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=29949 Change 29949 by jmallett@jmallett_dalek on 2003/04/28 10:23:51 Remove bogus comment. Exception vectors are in mipsX_subr.S... Affected files ... .. //depot/projects/mips/sys/mips/mips/locore_mips3.S#2 edit Differences ... ==== //depot/projects/mips/sys/mips/mips/locore_mips3.S#2 (text+ko) ==== @@ -116,15 +116,6 @@ * for those CPU, define COP0_SYNC as sync.p */ -/* - *============================================================================ - * - * MIPS III ISA support, part 1: locore exception vectors. - * The following code is copied to the vector locations to which - * the CPU jumps in response to an exception or a TLB miss. - * - *============================================================================ - */ .set noreorder .set mips3
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