Date: Sun, 26 Sep 2021 16:25:55 GMT From: Kevin Bowling <kbowling@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 21ab8c75c940 - main - e1000: Fix tabstop width in if_em.h Message-ID: <202109261625.18QGPtfX049486@gitrepo.freebsd.org>
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The branch main has been updated by kbowling (ports committer): URL: https://cgit.FreeBSD.org/src/commit/?id=21ab8c75c940dd15343b4af28b18a66f377e670a commit 21ab8c75c940dd15343b4af28b18a66f377e670a Author: Kevin Bowling <kbowling@FreeBSD.org> AuthorDate: 2021-09-26 16:24:53 +0000 Commit: Kevin Bowling <kbowling@FreeBSD.org> CommitDate: 2021-09-26 16:24:53 +0000 e1000: Fix tabstop width in if_em.h Reviewed by: markj Differential Revision: https://reviews.freebsd.org/D32145 --- sys/dev/e1000/if_em.h | 236 +++++++++++++++++++++++++------------------------- 1 file changed, 118 insertions(+), 118 deletions(-) diff --git a/sys/dev/e1000/if_em.h b/sys/dev/e1000/if_em.h index 7f259abfd9a6..41deecb69bf3 100644 --- a/sys/dev/e1000/if_em.h +++ b/sys/dev/e1000/if_em.h @@ -111,11 +111,11 @@ * desscriptors should meet the following condition. * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 */ -#define EM_MIN_TXD 128 -#define EM_MAX_TXD 4096 -#define EM_DEFAULT_TXD 1024 +#define EM_MIN_TXD 128 +#define EM_MAX_TXD 4096 +#define EM_DEFAULT_TXD 1024 #define EM_DEFAULT_MULTI_TXD 4096 -#define IGB_MAX_TXD 4096 +#define IGB_MAX_TXD 4096 /* * EM_MAX_RXD - Maximum number of receive Descriptors @@ -130,11 +130,11 @@ * desscriptors should meet the following condition. * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0 */ -#define EM_MIN_RXD 128 -#define EM_MAX_RXD 4096 -#define EM_DEFAULT_RXD 1024 +#define EM_MIN_RXD 128 +#define EM_MAX_RXD 4096 +#define EM_DEFAULT_RXD 1024 #define EM_DEFAULT_MULTI_RXD 4096 -#define IGB_MAX_RXD 4096 +#define IGB_MAX_RXD 4096 /* * EM_TIDV - Transmit Interrupt Delay Value @@ -201,7 +201,7 @@ * 0 - Disable autonegotiation * 1 - Enable autonegotiation */ -#define DO_AUTO_NEG 1 +#define DO_AUTO_NEG 1 /* * This parameter control whether or not the driver will wait for @@ -214,8 +214,8 @@ /* Tunables -- End */ #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \ - ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ - ADVERTISE_1000_FULL) + ADVERTISE_100_HALF | ADVERTISE_100_FULL | \ + ADVERTISE_1000_FULL) #define AUTO_ALL_MODES 0 @@ -225,35 +225,35 @@ /* * Miscellaneous constants */ -#define EM_VENDOR_ID 0x8086 -#define EM_FLASH 0x0014 +#define EM_VENDOR_ID 0x8086 +#define EM_FLASH 0x0014 -#define EM_JUMBO_PBA 0x00000028 -#define EM_DEFAULT_PBA 0x00000030 +#define EM_JUMBO_PBA 0x00000028 +#define EM_DEFAULT_PBA 0x00000030 #define EM_SMARTSPEED_DOWNSHIFT 3 -#define EM_SMARTSPEED_MAX 15 -#define EM_MAX_LOOP 10 +#define EM_SMARTSPEED_MAX 15 +#define EM_MAX_LOOP 10 #define MAX_NUM_MULTICAST_ADDRESSES 128 -#define PCI_ANY_ID (~0U) -#define ETHER_ALIGN 2 -#define EM_FC_PAUSE_TIME 0x0680 -#define EM_EEPROM_APME 0x400; -#define EM_82544_APME 0x0004; +#define PCI_ANY_ID (~0U) +#define ETHER_ALIGN 2 +#define EM_FC_PAUSE_TIME 0x0680 +#define EM_EEPROM_APME 0x400; +#define EM_82544_APME 0x0004; /* Support AutoMediaDetect for Marvell M88 PHY in i354 */ -#define IGB_MEDIA_RESET (1 << 0) +#define IGB_MEDIA_RESET (1 << 0) /* Define the starting Interrupt rate per Queue */ -#define IGB_INTS_PER_SEC 8000 -#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) +#define IGB_INTS_PER_SEC 8000 +#define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2) -#define IGB_LINK_ITR 2000 -#define I210_LINK_DELAY 1000 +#define IGB_LINK_ITR 2000 +#define I210_LINK_DELAY 1000 -#define IGB_TXPBSIZE 20408 -#define IGB_HDR_BUF 128 -#define IGB_PKTTYPE_MASK 0x0000FFF0 +#define IGB_TXPBSIZE 20408 +#define IGB_HDR_BUF 128 +#define IGB_PKTTYPE_MASK 0x0000FFF0 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ /* @@ -265,25 +265,25 @@ * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, * reset adapter. */ -#define EM_TX_IDLE 0x00000000 -#define EM_TX_BUSY 0x00000001 -#define EM_TX_HUNG 0x80000000 +#define EM_TX_IDLE 0x00000000 +#define EM_TX_BUSY 0x00000001 +#define EM_TX_HUNG 0x80000000 #define EM_TX_MAXTRIES 10 -#define PCICFG_DESC_RING_STATUS 0xe4 -#define FLUSH_DESC_REQUIRED 0x100 +#define PCICFG_DESC_RING_STATUS 0xe4 +#define FLUSH_DESC_REQUIRED 0x100 -#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ - ((hw->mac.type <= e1000_82576) ? 16 : 8)) -#define IGB_RX_HTHRESH 8 -#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ - (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) +#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \ + ((hw->mac.type <= e1000_82576) ? 16 : 8)) +#define IGB_RX_HTHRESH 8 +#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \ + (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4) -#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) -#define IGB_TX_HTHRESH 1 -#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ - sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) +#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8) +#define IGB_TX_HTHRESH 1 +#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \ + sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16) /* * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be @@ -297,10 +297,10 @@ */ #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ -#define TARC_MQ_FIX (1 << 23) | \ - (1 << 24) | \ - (1 << 25) /* Handle errata in MQ mode */ -#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ +#define TARC_MQ_FIX (1 << 23) | \ + (1 << 24) | \ + (1 << 25) /* Handle errata in MQ mode */ +#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ /* PCI Config defines */ #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) @@ -318,27 +318,27 @@ #define DEBUG_IOCTL 0 #define DEBUG_HW 0 -#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") +#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) -#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") +#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) -#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") -#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) +#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") +#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) #define EM_MAX_SCATTER 40 #define EM_VFTA_SIZE 128 -#define EM_TSO_SIZE 65535 +#define EM_TSO_SIZE 65535 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */ -#define ETH_ZLEN 60 +#define ETH_ZLEN 60 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */ #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \ - CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ - CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ + CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \ + CSUM_IP6_SCTP) /* Offload bits in mbuf flag */ -#define IGB_PKTTYPE_MASK 0x0000FFF0 +#define IGB_PKTTYPE_MASK 0x0000FFF0 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */ /* @@ -361,15 +361,15 @@ struct e1000_softc; struct em_int_delay_info { struct e1000_softc *sc; /* Back-pointer to the sc struct */ - int offset; /* Register offset to read/write */ - int value; /* Current value in usecs */ + int offset; /* Register offset to read/write */ + int value; /* Current value in usecs */ }; /* * The transmit ring, one per tx queue */ struct tx_ring { - struct e1000_softc *sc; + struct e1000_softc *sc; struct e1000_tx_desc *tx_base; uint64_t tx_paddr; qidx_t *tx_rsq; @@ -380,8 +380,8 @@ struct tx_ring { qidx_t tx_cidx_processed; /* Interrupt resources */ void *tag; - struct resource *res; - unsigned long tx_irq; + struct resource *res; + unsigned long tx_irq; /* Saved csum offloading context information */ int csum_flags; @@ -402,10 +402,10 @@ struct tx_ring { struct rx_ring { struct e1000_softc *sc; struct em_rx_queue *que; - u32 me; - u32 payload; + u32 me; + u32 payload; union e1000_rx_desc_extended *rx_base; - uint64_t rx_paddr; + uint64_t rx_paddr; /* Interrupt resources */ void *tag; @@ -421,36 +421,36 @@ struct rx_ring { struct em_tx_queue { struct e1000_softc *sc; - u32 msix; - u32 eims; /* This queue's EIMS bit */ - u32 me; + u32 msix; + u32 eims; /* This queue's EIMS bit */ + u32 me; struct tx_ring txr; }; struct em_rx_queue { struct e1000_softc *sc; - u32 me; - u32 msix; - u32 eims; + u32 me; + u32 msix; + u32 eims; struct rx_ring rxr; - u64 irqs; + u64 irqs; struct if_irq que_irq; }; /* Our softc structure */ struct e1000_softc { - struct ifnet *ifp; - struct e1000_hw hw; + struct ifnet *ifp; + struct e1000_hw hw; - if_softc_ctx_t shared; - if_ctx_t ctx; -#define tx_num_queues shared->isc_ntxqsets -#define rx_num_queues shared->isc_nrxqsets + if_softc_ctx_t shared; + if_ctx_t ctx; +#define tx_num_queues shared->isc_ntxqsets +#define rx_num_queues shared->isc_nrxqsets #define intr_type shared->isc_intr /* FreeBSD operating-system-specific structures. */ struct e1000_osdep osdep; - device_t dev; - struct cdev *led_dev; + device_t dev; + struct cdev *led_dev; struct em_tx_queue *tx_queues; struct em_rx_queue *rx_queues; @@ -461,35 +461,35 @@ struct e1000_softc { struct resource *ioport; struct resource *res; - void *tag; - u32 linkvec; - u32 ivars; - - struct ifmedia *media; - int msix; - int if_flags; - int em_insert_vlan_header; - u32 ims; + void *tag; + u32 linkvec; + u32 ivars; + + struct ifmedia *media; + int msix; + int if_flags; + int em_insert_vlan_header; + u32 ims; bool in_detach; - u32 flags; + u32 flags; /* Task for FAST handling */ struct grouptask link_task; - u16 num_vlans; - u32 txd_cmd; + u16 num_vlans; + u32 txd_cmd; - u32 tx_process_limit; - u32 rx_process_limit; - u32 rx_mbuf_sz; + u32 tx_process_limit; + u32 rx_process_limit; + u32 rx_mbuf_sz; /* Management and WOL features */ - u32 wol; - bool has_manage; - bool has_amt; + u32 wol; + bool has_manage; + bool has_amt; /* Multicast array memory */ - u8 *mta; + u8 *mta; /* ** Shadow VFTA table, this is needed because @@ -497,18 +497,18 @@ struct e1000_softc { ** a soft reset and the driver needs to be able ** to repopulate it. */ - u32 shadow_vfta[EM_VFTA_SIZE]; + u32 shadow_vfta[EM_VFTA_SIZE]; /* Info about the interface */ - u16 link_active; - u16 fc; - u16 link_speed; - u16 link_duplex; - u32 smartspeed; - u32 dmac; - int link_mask; + u16 link_active; + u16 fc; + u16 link_speed; + u16 link_duplex; + u32 smartspeed; + u32 dmac; + int link_mask; - u64 que_mask; + u64 que_mask; struct em_int_delay_info tx_int_delay; struct em_int_delay_info tx_abs_int_delay; @@ -517,13 +517,13 @@ struct e1000_softc { struct em_int_delay_info tx_itr; /* Misc stats maintained by the driver */ - unsigned long dropped_pkts; - unsigned long link_irq; - unsigned long rx_overruns; - unsigned long watchdog_events; + unsigned long dropped_pkts; + unsigned long link_irq; + unsigned long rx_overruns; + unsigned long watchdog_events; - struct e1000_hw_stats stats; - u16 vf_ifp; + struct e1000_hw_stats stats; + u16 vf_ifp; }; /******************************************************************************** @@ -544,8 +544,8 @@ typedef struct _em_vendor_info_t { void em_dump_rs(struct e1000_softc *); #define EM_RSSRK_SIZE 4 -#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ - key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ - key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ - key[(i) * EM_RSSRK_SIZE + 3] << 24) +#define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \ + key[(i) * EM_RSSRK_SIZE + 1] << 8 | \ + key[(i) * EM_RSSRK_SIZE + 2] << 16 | \ + key[(i) * EM_RSSRK_SIZE + 3] << 24) #endif /* _EM_H_DEFINED_ */
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