Date: Sat, 5 Sep 2015 23:23:00 +0000 (UTC) From: Baptiste Daroussin <bapt@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r287496 - head/sys/dev/drm2/i915 Message-ID: <201509052323.t85NN0iC012470@repo.freebsd.org>
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Author: bapt Date: Sat Sep 5 23:22:59 2015 New Revision: 287496 URL: https://svnweb.freebsd.org/changeset/base/287496 Log: Reduce diff with linux 3.8.13 on i915 headers Modified: head/sys/dev/drm2/i915/intel_drv.h head/sys/dev/drm2/i915/intel_ringbuffer.h head/sys/dev/drm2/i915/intel_sdvo_regs.h Modified: head/sys/dev/drm2/i915/intel_drv.h ============================================================================== --- head/sys/dev/drm2/i915/intel_drv.h Sat Sep 5 22:54:02 2015 (r287495) +++ head/sys/dev/drm2/i915/intel_drv.h Sat Sep 5 23:22:59 2015 (r287496) @@ -73,6 +73,10 @@ #define KHz(x) (1000*x) #define MHz(x) KHz(1000*x) +/* + * Display related stuff + */ + /* store information about an Ixxx DVO */ /* The i830->i865 use multiple DVOs with multiple i2cs */ /* the i915, i945 have a single sDVO i2c bus - which is different */ @@ -94,6 +98,7 @@ #define INTEL_OUTPUT_HDMI 6 #define INTEL_OUTPUT_DISPLAYPORT 7 #define INTEL_OUTPUT_EDP 8 +#define INTEL_OUTPUT_UNKNOWN 9 /* Intel Pipe Clone Bit */ #define INTEL_HDMIB_CLONE_BIT 1 Modified: head/sys/dev/drm2/i915/intel_ringbuffer.h ============================================================================== --- head/sys/dev/drm2/i915/intel_ringbuffer.h Sat Sep 5 22:54:02 2015 (r287495) +++ head/sys/dev/drm2/i915/intel_ringbuffer.h Sat Sep 5 23:22:59 2015 (r287496) @@ -5,6 +5,17 @@ #ifndef _INTEL_RINGBUFFER_H_ #define _INTEL_RINGBUFFER_H_ +/* + * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use" + * Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use" + * Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use" + * + * "If the Ring Buffer Head Pointer and the Tail Pointer are on the same + * cacheline, the Head Pointer must not be greater than the Tail + * Pointer." + */ +#define I915_RING_FREE_SPACE 64 + struct intel_hw_status_page { u32 *page_addr; unsigned int gfx_addr; @@ -60,7 +71,7 @@ struct intel_ring_buffer { */ u32 last_retired_head; - u32 irq_refcount; + u32 irq_refcount; /* protected by dev_priv->irq_lock */ u32 irq_enable_mask; /* bitmask to enable ring interrupt */ u32 trace_irq_seqno; u32 sync_seqno[I915_NUM_RINGS-1]; @@ -79,14 +90,15 @@ struct intel_ring_buffer { uint32_t (*get_seqno)(struct intel_ring_buffer *ring); int (*dispatch_execbuffer)(struct intel_ring_buffer *ring, uint32_t offset, uint32_t length); +#define I915_DISPATCH_SECURE 0x1 +#define I915_DISPATCH_PINNED 0x2 void (*cleanup)(struct intel_ring_buffer *ring); int (*sync_to)(struct intel_ring_buffer *ring, struct intel_ring_buffer *to, u32 seqno); - + u32 semaphore_register[3]; /*our mbox written by others */ u32 signal_mbox[2]; /* mboxes this ring signals to */ - /** * List of objects currently involved in rendering from the * ringbuffer. @@ -162,10 +174,10 @@ intel_ring_sync_index(struct intel_ring_ return idx; } -static inline uint32_t -intel_read_status_page(struct intel_ring_buffer *ring, int reg) +static inline u32 +intel_read_status_page(struct intel_ring_buffer *ring, + int reg) { - /* Ensure that the compiler doesn't optimize away the load. */ __compiler_membar(); return (atomic_load_acq_32(ring->status_page.page_addr + reg)); @@ -183,7 +195,7 @@ static inline int intel_wait_ring_idle(s int intel_ring_begin(struct intel_ring_buffer *ring, int n); static inline void intel_ring_emit(struct intel_ring_buffer *ring, - uint32_t data) + u32 data) { *(volatile uint32_t *)((char *)ring->virtual_start + ring->tail) = data; Modified: head/sys/dev/drm2/i915/intel_sdvo_regs.h ============================================================================== --- head/sys/dev/drm2/i915/intel_sdvo_regs.h Sat Sep 5 22:54:02 2015 (r287495) +++ head/sys/dev/drm2/i915/intel_sdvo_regs.h Sat Sep 5 23:22:59 2015 (r287496) @@ -63,6 +63,11 @@ struct intel_sdvo_caps { u16 output_flags; } __attribute__((packed)); +/* Note: SDVO detailed timing flags match EDID misc flags. */ +#define DTD_FLAG_HSYNC_POSITIVE (1 << 1) +#define DTD_FLAG_VSYNC_POSITIVE (1 << 2) +#define DTD_FLAG_INTERLACE (1 << 7) + /** This matches the EDID DTD structure, more or less */ struct intel_sdvo_dtd { struct { @@ -705,6 +710,8 @@ struct intel_sdvo_enhancements_arg { #define SDVO_CMD_SET_AUDIO_STAT 0x91 #define SDVO_CMD_GET_AUDIO_STAT 0x92 #define SDVO_CMD_SET_HBUF_INDEX 0x93 + #define SDVO_HBUF_INDEX_ELD 0 + #define SDVO_HBUF_INDEX_AVI_IF 1 #define SDVO_CMD_GET_HBUF_INDEX 0x94 #define SDVO_CMD_GET_HBUF_INFO 0x95 #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96
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