Date: Mon, 30 Aug 2010 13:05:21 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r211994 - in head/sys/mips/rmi: . dev/nlge dev/xlr Message-ID: <201008301305.o7UD5LPV095529@svn.freebsd.org>
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Author: jchandra Date: Mon Aug 30 13:05:21 2010 New Revision: 211994 URL: http://svn.freebsd.org/changeset/base/211994 Log: Clean up header files in RMI platform code (sys/mips/rmi), and remove unused files. - remove clock.c and clock.h, these are not used after the new timer code was added. - remove duplicated include files, fix header file ordering, remove some unneeded includes. - rename mips/rmi/shared_structs.h which contains the RMI boot loader interface to mips/rmi/rmi_boot_info.h. Remove unused files mips/rmi/shared_structs_func.h and sys/mips/rmi/shared_structs_offsets.h - merge mips/rmi/xlrconfig.h and mips/rmi/rmi_mips_exts.h, and remove duplicated functions. - nlge - minor change to remove unneeded argument. - Add FreeBSD svn keyword for headers Added: head/sys/mips/rmi/rmi_boot_info.h - copied, changed from r211984, head/sys/mips/rmi/shared_structs.h Deleted: head/sys/mips/rmi/clock.c head/sys/mips/rmi/clock.h head/sys/mips/rmi/shared_structs.h head/sys/mips/rmi/shared_structs_func.h head/sys/mips/rmi/shared_structs_offsets.h head/sys/mips/rmi/xlrconfig.h Modified: head/sys/mips/rmi/board.c head/sys/mips/rmi/board.h head/sys/mips/rmi/debug.h head/sys/mips/rmi/dev/nlge/if_nlge.c head/sys/mips/rmi/dev/xlr/rge.c head/sys/mips/rmi/interrupt.h head/sys/mips/rmi/intr_machdep.c head/sys/mips/rmi/iodi.c head/sys/mips/rmi/iomap.h head/sys/mips/rmi/msgring.h head/sys/mips/rmi/pic.h head/sys/mips/rmi/rmi_mips_exts.h head/sys/mips/rmi/xlr_machdep.c head/sys/mips/rmi/xlr_pci.c Modified: head/sys/mips/rmi/board.c ============================================================================== --- head/sys/mips/rmi/board.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/board.c Mon Aug 30 13:05:21 2010 (r211994) @@ -38,9 +38,9 @@ __FBSDID("$FreeBSD$"); #include <machine/cpufunc.h> #include <mips/rmi/msgring.h> +#include <mips/rmi/rmi_boot_info.h> #include <mips/rmi/board.h> #include <mips/rmi/pic.h> -#include <mips/rmi/shared_structs.h> static int xlr_rxstn_to_txstn_map[128] = { [0 ... 7] = TX_STN_CPU_0, Modified: head/sys/mips/rmi/board.h ============================================================================== --- head/sys/mips/rmi/board.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/board.h Mon Aug 30 13:05:21 2010 (r211994) @@ -104,10 +104,10 @@ xlr_processor_id(void) * These should come up in PCI device mode (not yet) */ static __inline__ int -xlr_board_pci(void) +xlr_board_pci(int board_major) { - return ((xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_III) || - (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_V)); + return ((board_major == RMI_XLR_BOARD_ARIZONA_III) || + (board_major == RMI_XLR_BOARD_ARIZONA_V)); } static __inline__ int Modified: head/sys/mips/rmi/debug.h ============================================================================== --- head/sys/mips/rmi/debug.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/debug.h Mon Aug 30 13:05:21 2010 (r211994) @@ -26,7 +26,9 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef _RMI_DEBUG_H_ #define _RMI_DEBUG_H_ Modified: head/sys/mips/rmi/dev/nlge/if_nlge.c ============================================================================== --- head/sys/mips/rmi/dev/nlge/if_nlge.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/dev/nlge/if_nlge.c Mon Aug 30 13:05:21 2010 (r211994) @@ -104,10 +104,9 @@ __FBSDID("$FreeBSD$"); #include <mips/rmi/iomap.h> #include <mips/rmi/debug.h> #include <mips/rmi/pic.h> -#include <mips/rmi/xlrconfig.h> -#include <mips/rmi/shared_structs.h> #include <mips/rmi/board.h> #include <mips/rmi/rmi_mips_exts.h> +#include <mips/rmi/rmi_boot_info.h> #include <mips/rmi/dev/xlr/atx_cpld.h> #include <mips/rmi/dev/xlr/xgmac_mdio.h> @@ -209,7 +208,7 @@ static int prepare_fmn_message(struct nl uint64_t fr_stid, struct nlge_tx_desc **tx_desc); static void release_mbuf(uint64_t phy_addr); -static void release_tx_desc(struct msgrng_msg *msg, int rel_buf); +static void release_tx_desc(struct msgrng_msg *msg); static int send_fmn_msg_tx(struct nlge_softc *, struct msgrng_msg *, uint32_t n_entries); @@ -679,7 +678,7 @@ nlge_msgring_handler(int bucket, int siz if (ctrl == CTRL_REG_FREE || ctrl == CTRL_JUMBO_FREE) { if (is_p2p) - release_tx_desc(msg, 1); + release_tx_desc(msg); else { release_mbuf(msg->msg0 & 0xffffffffffULL); } @@ -725,7 +724,7 @@ nlge_start_locked(struct ifnet *ifp, str cpu = xlr_core_id(); tid = xlr_thr_id(); - fr_stid = (cpu << 3) + tid + 4; /* Each CPU has 8 buckets. */ + fr_stid = cpu * 8 + tid + 4; if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { return; @@ -1909,9 +1908,9 @@ prepare_fmn_message(struct nlge_softc *s while (len) { if (msg_sz == (FMN_SZ - 1)) { - p2p = uma_zalloc(nl_tx_desc_zone, M_NOWAIT); - if (p2p == NULL) - return 2; + p2p = uma_zalloc(nl_tx_desc_zone, M_WAITOK); + if (p2p == NULL) + return 2; /* * As we currently use xlr_paddr_lw on a 32-bit * OS, both the pointers are laid out in one @@ -1929,7 +1928,7 @@ prepare_fmn_message(struct nlge_softc *s return 1; } paddr = vtophys(buf); - frag_sz = PAGE_SIZE - (buf & PAGE_MASK) ; + frag_sz = PAGE_SIZE - (buf & PAGE_MASK); if (len < frag_sz) frag_sz = len; *cur_p2d++ = (127ULL << 54) | ((uint64_t)frag_sz << 40) @@ -1993,7 +1992,7 @@ release_mbuf(uint64_t phy_addr) } static void -release_tx_desc(struct msgrng_msg *msg, int rel_buf) +release_tx_desc(struct msgrng_msg *msg) { vm_paddr_t paddr; uint64_t temp; @@ -2005,17 +2004,12 @@ release_tx_desc(struct msgrng_msg *msg, paddr += (XLR_MAX_TX_FRAGS * sizeof(uint64_t)); sr = xlr_enable_kx(); temp = xlr_paddr_lw(paddr); - mips_wr_status(sr); tx_desc = (struct nlge_tx_desc*)((intptr_t) temp); - - if (rel_buf) { - paddr += sizeof(void *); - sr = xlr_enable_kx(); - temp = xlr_paddr_lw(paddr); - mips_wr_status(sr); - m = (struct mbuf *)((intptr_t) temp); - m_freem(m); - } + paddr += sizeof(void *); + temp = xlr_paddr_lw(paddr); + mips_wr_status(sr); + m = (struct mbuf *)((intptr_t) temp); + m_freem(m); uma_zfree(nl_tx_desc_zone, tx_desc); } Modified: head/sys/mips/rmi/dev/xlr/rge.c ============================================================================== --- head/sys/mips/rmi/dev/xlr/rge.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/dev/xlr/rge.c Mon Aug 30 13:05:21 2010 (r211994) @@ -55,6 +55,7 @@ __FBSDID("$FreeBSD$"); #include <sys/rman.h> #include <sys/taskqueue.h> #include <sys/smp.h> +#include <sys/sysctl.h> #include <net/if.h> #include <net/if_arp.h> @@ -63,7 +64,6 @@ __FBSDID("$FreeBSD$"); #include <net/if_media.h> #include <net/bpf.h> - #include <net/if_types.h> #include <net/if_vlan_var.h> @@ -87,27 +87,23 @@ __FBSDID("$FreeBSD$"); #include <machine/cpuregs.h> #include <machine/bus.h> /* */ #include <machine/resource.h> + +#include <dev/mii/mii.h> +#include <dev/mii/miivar.h> +#include <dev/mii/brgphyreg.h> + #include <mips/rmi/interrupt.h> #include <mips/rmi/msgring.h> #include <mips/rmi/iomap.h> #include <mips/rmi/debug.h> #include <mips/rmi/pic.h> -#include <mips/rmi/xlrconfig.h> -#include <mips/rmi/shared_structs.h> +#include <mips/rmi/rmi_mips_exts.h> +#include <mips/rmi/rmi_boot_info.h> #include <mips/rmi/board.h> - #include <mips/rmi/dev/xlr/atx_cpld.h> #include <mips/rmi/dev/xlr/xgmac_mdio.h> - -#include <dev/mii/mii.h> -#include <dev/mii/miivar.h> -#include <dev/mii/brgphyreg.h> - -#include <sys/sysctl.h> #include <mips/rmi/dev/xlr/rge.h> -/* #include "opt_rge.h" */ - #include "miibus_if.h" MODULE_DEPEND(rge, ether, 1, 1, 1); Modified: head/sys/mips/rmi/interrupt.h ============================================================================== --- head/sys/mips/rmi/interrupt.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/interrupt.h Mon Aug 30 13:05:21 2010 (r211994) @@ -25,8 +25,10 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - *__FBSDID("$FreeBSD$") - * RMI_BSD */ + * + * RMI_BSD + * $FreeBSD$ + */ #ifndef _RMI_INTERRUPT_H_ #define _RMI_INTERRUPT_H_ Modified: head/sys/mips/rmi/intr_machdep.c ============================================================================== --- head/sys/mips/rmi/intr_machdep.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/intr_machdep.c Mon Aug 30 13:05:21 2010 (r211994) @@ -44,9 +44,9 @@ __FBSDID("$FreeBSD$"); #include <machine/md_var.h> #include <machine/trap.h> #include <machine/hwfunc.h> -#include <mips/rmi/xlrconfig.h> + +#include <mips/rmi/rmi_mips_exts.h> #include <mips/rmi/interrupt.h> -#include <mips/rmi/clock.h> #include <mips/rmi/pic.h> struct xlr_intrsrc { Modified: head/sys/mips/rmi/iodi.c ============================================================================== --- head/sys/mips/rmi/iodi.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/iodi.c Mon Aug 30 13:05:21 2010 (r211994) @@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$"); #include <sys/lock.h> #include <sys/mutex.h> #include <sys/reboot.h> +#include <sys/rman.h> #include <sys/types.h> #include <sys/malloc.h> #include <sys/bus.h> @@ -48,28 +49,17 @@ __FBSDID("$FreeBSD$"); #include <machine/cpu.h> #include <machine/bus.h> -#include <machine/bus.h> -#include <machine/intr_machdep.h> -#include <mips/rmi/iomap.h> -#include <mips/rmi/pic.h> -#include <mips/rmi/shared_structs.h> -#include <mips/rmi/board.h> -#include <sys/rman.h> - - #include <machine/param.h> #include <machine/intr_machdep.h> #include <machine/clock.h> /* for DELAY */ -#include <machine/bus.h> #include <machine/resource.h> + +#include <mips/rmi/board.h> +#include <mips/rmi/pic.h> #include <mips/rmi/interrupt.h> #include <mips/rmi/msgring.h> #include <mips/rmi/iomap.h> -#include <mips/rmi/debug.h> -#include <mips/rmi/pic.h> -#include <mips/rmi/xlrconfig.h> -#include <mips/rmi/shared_structs.h> -#include <mips/rmi/board.h> +#include <mips/rmi/rmi_mips_exts.h> #include <mips/rmi/dev/xlr/atx_cpld.h> #include <mips/rmi/dev/xlr/xgmac_mdio.h> Modified: head/sys/mips/rmi/iomap.h ============================================================================== --- head/sys/mips/rmi/iomap.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/iomap.h Mon Aug 30 13:05:21 2010 (r211994) @@ -26,7 +26,9 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef _RMI_IOMAP_H_ #define _RMI_IOMAP_H_ Modified: head/sys/mips/rmi/msgring.h ============================================================================== --- head/sys/mips/rmi/msgring.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/msgring.h Mon Aug 30 13:05:21 2010 (r211994) @@ -25,13 +25,15 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * $FreeBSD$ * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef _RMI_MSGRING_H_ #define _RMI_MSGRING_H_ -#include <mips/rmi/xlrconfig.h> +#include <sys/types.h> +#include <mips/rmi/rmi_mips_exts.h> #define MSGRNG_TX_BUF_REG 0 #define MSGRNG_RX_BUF_REG 1 @@ -368,9 +370,6 @@ message_send(unsigned int size, unsigned dest = ((size - 1) << 16) | (code << 8) | (stid); - //dbg_msg("Sending msg<%Lx,%Lx,%Lx,%Lx> to dest = %x\n", - //msg->msg0, msg->msg1, msg->msg2, msg->msg3, dest); - msgrng_send(dest); for (i = 0; i < 16; i++) { Modified: head/sys/mips/rmi/pic.h ============================================================================== --- head/sys/mips/rmi/pic.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/pic.h Mon Aug 30 13:05:21 2010 (r211994) @@ -25,9 +25,10 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * __FBSDID("$FreeBSD$"); * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef _RMI_PIC_H_ #define _RMI_PIC_H_ Copied and modified: head/sys/mips/rmi/rmi_boot_info.h (from r211984, head/sys/mips/rmi/shared_structs.h) ============================================================================== --- head/sys/mips/rmi/shared_structs.h Mon Aug 30 00:31:30 2010 (r211984, copy source) +++ head/sys/mips/rmi/rmi_boot_info.h Mon Aug 30 13:05:21 2010 (r211994) @@ -26,13 +26,12 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef _SHARED_STRUCTS_H #define _SHARED_STRUCTS_H -/* If you make any changes to the below structs, shared_structs_offsets.h - * should be regenerated - */ #define BOOT1_INFO_VERSION 0x0001 struct boot1_info { Modified: head/sys/mips/rmi/rmi_mips_exts.h ============================================================================== --- head/sys/mips/rmi/rmi_mips_exts.h Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/rmi_mips_exts.h Mon Aug 30 13:05:21 2010 (r211994) @@ -26,27 +26,12 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * RMI_BSD */ + * RMI_BSD + * $FreeBSD$ + */ #ifndef __MIPS_EXTS_H__ #define __MIPS_EXTS_H__ -#define enable_KX(flags) __asm__ __volatile__ ( \ - ".set push\n" \ - ".set noat\n" \ - ".set noreorder\n" \ - "mfc0 %0, $12\n\t" \ - "ori $1, %0, 0x81\n\t" \ - "xori $1, 1\n\t" \ - "mtc0 $1, $12\n" \ - ".set pop\n" \ - : "=r"(flags) ) - -#define disable_KX(flags) __asm__ __volatile__ ( \ - ".set push\n" \ - "mtc0 %0, $12\n" \ - ".set pop\n" \ - : : "r"(flags) ) - #define CPU_BLOCKID_IFU 0 #define CPU_BLOCKID_ICU 1 #define CPU_BLOCKID_IEU 2 @@ -140,5 +125,327 @@ static __inline__ void write_64bit_phnx_ ); } +#define read_c0_register32(reg, sel) \ +({ unsigned int __rv; \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips32\n\t" \ + "mfc0\t%0,$%1,%2\n\t" \ + ".set\tpop" \ + : "=r" (__rv) : "i" (reg), "i" (sel) ); \ + __rv;}) + +#define write_c0_register32(reg, sel, value) \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips32\n\t" \ + "mtc0\t%0,$%1,%2\n\t" \ + ".set\tpop" \ + : : "r" (value), "i" (reg), "i" (sel) ); + +#define read_c0_register64(reg, sel) \ + ({ unsigned int __high, __low; \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips64\n\t" \ + "dmfc0\t $8, $%2, %3\n\t" \ + "dsrl32\t%0, $8, 0\n\t" \ + "dsll32\t$8, $8, 0\n\t" \ + "dsrl32\t%1, $8, 0\n\t" \ + ".set\tpop" \ + : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel): "$8" );\ + (((unsigned long long)__high << 32) | __low);}) + +#define write_c0_register64(reg, sel, value) \ + do{ \ + unsigned int __high = val>>32; \ + unsigned int __low = val & 0xffffffff; \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips64\n\t" \ + "dsll32\t$8, %1, 0\n\t" \ + "dsll32\t$9, %0, 0\n\t" \ + "or\t $8, $8, $9\n\t" \ + "dmtc0\t $8, $%2, %3\n\t" \ + ".set\tpop" \ + :: "r"(high), "r"(low), "i"(reg), "i"(sel):"$8", "$9");\ + } while(0) + +#define read_c2_register32(reg, sel) \ +({ unsigned int __rv; \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips32\n\t" \ + "mfc2\t%0,$%1,%2\n\t" \ + ".set\tpop" \ + : "=r" (__rv) : "i" (reg), "i" (sel) ); \ + __rv;}) + +#define write_c2_register32(reg, sel, value) \ + __asm__ __volatile__( \ + ".set\tpush\n\t" \ + ".set mips32\n\t" \ + "mtc2\t%0,$%1,%2\n\t" \ + ".set\tpop" \ + : : "r" (value), "i" (reg), "i" (sel) ); + +#define read_c2_register64(reg, sel) \ + ({ unsigned int __high, __low; \ + __asm__ __volatile__( \ + ".set mips64\n\t" \ + "dmfc2\t $8, $%2, %3\n\t" \ + "dsrl32\t%0, $8, 0\n\t" \ + "dsll32\t$8, $8, 0\n\t" \ + "dsrl32\t%1, $8, 0\n\t" \ + ".set\tmips0" \ + : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel): "$8" );\ + (((unsigned long long)__high << 32) | __low);}) + +#define write_c2_register64(reg, sel, value) \ + do{ \ + unsigned int __high = value>>32; \ + unsigned int __low = value & 0xffffffff; \ + __asm__ __volatile__( \ + ".set mips64\n\t" \ + "dsll32\t$8, %1, 0\n\t" \ + "dsll32\t$9, %0, 0\n\t" \ + "dsrl32\t$8, $8, 0\n\t" \ + "or\t $8, $8, $9\n\t" \ + "dmtc2\t $8, $%2, %3\n\t" \ + ".set\tmips0" \ + :: "r"(__high), "r"(__low), \ + "i"(reg), "i"(sel) \ + :"$8", "$9"); \ + } while(0) + +#define xlr_cpu_id() \ +({int __id; \ + __asm__ __volatile__ ( \ + ".set push\n" \ + ".set noreorder\n" \ + "mfc0 $8, $15, 1\n" \ + "andi %0, $8, 0x1f\n" \ + ".set pop\n" \ + : "=r" (__id) : : "$8"); \ + __id;}) + +#define xlr_core_id() \ +({int __id; \ + __asm__ __volatile__ ( \ + ".set push\n" \ + ".set noreorder\n" \ + "mfc0 $8, $15, 1\n" \ + "andi %0, $8, 0x1f\n" \ + ".set pop\n" \ + : "=r" (__id) : : "$8"); \ + __id/4;}) + +#define xlr_thr_id() \ +({int __id; \ + __asm__ __volatile__ ( \ + ".set push\n" \ + ".set noreorder\n" \ + "mfc0 $8, $15, 1\n" \ + "andi %0, $8, 0x3\n" \ + ".set pop\n" \ + : "=r" (__id) : : "$8"); \ + __id;}) + + +/* Additional registers on the XLR */ +#define MIPS_COP_0_OSSCRATCH 22 + +#define XLR_CACHELINE_SIZE 32 + +#define XLR_MAX_CORES 8 + +/* functions to write to and read from the extended + * cp0 registers. + * EIRR : Extended Interrupt Request Register + * cp0 register 9 sel 6 + * bits 0...7 are same as cause register 8...15 + * EIMR : Extended Interrupt Mask Register + * cp0 register 9 sel 7 + * bits 0...7 are same as status register 8...15 + */ + +static inline uint64_t +read_c0_eirr64(void) +{ + __uint32_t high, low; + + __asm__ __volatile__( + ".set push\n" + ".set noreorder\n" + ".set noat\n" + ".set mips4\n" + + ".word 0x40214806 \n\t" + "nop \n\t" + "dsra32 %0, $1, 0 \n\t" + "sll %1, $1, 0 \n\t" + + ".set pop\n" + + : "=r"(high), "=r"(low) + ); + + return (((__uint64_t) high) << 32) | low; +} + +static inline __uint64_t +read_c0_eimr64(void) +{ + __uint32_t high, low; + + __asm__ __volatile__( + ".set push\n" + ".set noreorder\n" + ".set noat\n" + ".set mips4\n" + + ".word 0x40214807 \n\t" + "nop \n\t" + "dsra32 %0, $1, 0 \n\t" + "sll %1, $1, 0 \n\t" + + ".set pop\n" + + : "=r"(high), "=r"(low) + ); + + return (((__uint64_t) high) << 32) | low; +} + +static inline void +write_c0_eirr64(__uint64_t value) +{ + __uint32_t low, high; + + high = value >> 32; + low = value & 0xffffffff; + + __asm__ __volatile__( + ".set push\n" + ".set noreorder\n" + ".set noat\n" + ".set mips4\n\t" + + "dsll32 $2, %1, 0 \n\t" + "dsll32 $1, %0, 0 \n\t" + "dsrl32 $2, $2, 0 \n\t" + "or $1, $1, $2 \n\t" + ".word 0x40a14806 \n\t" + "nop \n\t" + + ".set pop\n" + + : + : "r"(high), "r"(low) + : "$1", "$2"); +} + +static inline void +write_c0_eimr64(__uint64_t value) +{ + __uint32_t low, high; + + high = value >> 32; + low = value & 0xffffffff; + + __asm__ __volatile__( + ".set push\n" + ".set noreorder\n" + ".set noat\n" + ".set mips4\n\t" + + "dsll32 $2, %1, 0 \n\t" + "dsll32 $1, %0, 0 \n\t" + "dsrl32 $2, $2, 0 \n\t" + "or $1, $1, $2 \n\t" + ".word 0x40a14807 \n\t" + "nop \n\t" + + ".set pop\n" + + : + : "r"(high), "r"(low) + : "$1", "$2"); +} + +static __inline__ int +xlr_test_and_set(int *lock) +{ + int oldval = 0; + + __asm__ __volatile__(".set push\n" + ".set noreorder\n" + "move $9, %2\n" + "li $8, 1\n" + // "swapw $8, $9\n" + ".word 0x71280014\n" + "move %1, $8\n" + ".set pop\n" + : "+m"(*lock), "=r"(oldval) + : "r"((unsigned long)lock) + : "$8", "$9" + ); + + return (oldval == 0 ? 1 /* success */ : 0 /* failure */ ); +} + +static __inline__ uint32_t +xlr_mfcr(uint32_t reg) +{ + uint32_t val; + + __asm__ __volatile__( + "move $8, %1\n" + ".word 0x71090018\n" + "move %0, $9\n" + : "=r"(val) + : "r"(reg):"$8", "$9"); + + return val; +} + +static __inline__ void +xlr_mtcr(uint32_t reg, uint32_t val) +{ + __asm__ __volatile__( + "move $8, %1\n" + "move $9, %0\n" + ".word 0x71090019\n" + :: "r"(val), "r"(reg) + : "$8", "$9"); +} + +static __inline__ uint32_t +xlr_paddr_lw(uint64_t paddr) +{ + uint32_t high, low, tmp; + + high = 0x98000000 | (paddr >> 32); + low = paddr & 0xffffffff; + + __asm__ __volatile__( + ".set push \n\t" + ".set mips64 \n\t" + "dsll32 %1, %1, 0 \n\t" + "dsll32 %2, %2, 0 \n\t" /* get rid of the */ + "dsrl32 %2, %2, 0 \n\t" /* sign extend */ + "or %1, %1, %2 \n\t" + "lw %0, 0(%1) \n\t" + ".set pop \n" + : "=r"(tmp) + : "r"(high), "r"(low)); + + return tmp; +} + +/* for cpuid to hardware thread id mapping */ +extern uint32_t xlr_hw_thread_mask; +extern int xlr_cpuid_to_hwtid[]; +extern int xlr_hwtid_to_cpuid[]; #endif Modified: head/sys/mips/rmi/xlr_machdep.c ============================================================================== --- head/sys/mips/rmi/xlr_machdep.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/xlr_machdep.c Mon Aug 30 13:05:21 2010 (r211994) @@ -66,15 +66,14 @@ __FBSDID("$FreeBSD$"); #include <machine/fls64.h> #include <machine/intr_machdep.h> #include <machine/smp.h> -#include <mips/rmi/rmi_mips_exts.h> #include <mips/rmi/iomap.h> -#include <mips/rmi/clock.h> #include <mips/rmi/msgring.h> -#include <mips/rmi/xlrconfig.h> #include <mips/rmi/interrupt.h> #include <mips/rmi/pic.h> #include <mips/rmi/board.h> +#include <mips/rmi/rmi_mips_exts.h> +#include <mips/rmi/rmi_boot_info.h> void mpwait(void); unsigned long xlr_io_base = (unsigned long)(DEFAULT_XLR_IO_BASE); Modified: head/sys/mips/rmi/xlr_pci.c ============================================================================== --- head/sys/mips/rmi/xlr_pci.c Mon Aug 30 10:30:35 2010 (r211993) +++ head/sys/mips/rmi/xlr_pci.c Mon Aug 30 13:05:21 2010 (r211994) @@ -38,23 +38,24 @@ __FBSDID("$FreeBSD$"); #include <sys/malloc.h> #include <sys/bus.h> #include <sys/endian.h> -#include <machine/bus.h> -#include <machine/md_var.h> -#include <machine/intr_machdep.h> -#include <mips/rmi/rmi_mips_exts.h> -#include <mips/rmi/interrupt.h> -#include <machine/cpuregs.h> +#include <sys/rman.h> + #include <vm/vm.h> #include <vm/vm_param.h> #include <vm/pmap.h> -#include <sys/rman.h> #include <dev/pci/pcivar.h> #include <dev/pci/pcireg.h> +#include <machine/bus.h> +#include <machine/md_var.h> +#include <machine/intr_machdep.h> +#include <machine/cpuregs.h> + +#include <mips/rmi/rmi_mips_exts.h> +#include <mips/rmi/interrupt.h> #include <mips/rmi/iomap.h> #include <mips/rmi/pic.h> -#include <mips/rmi/shared_structs.h> #include <mips/rmi/board.h> #include <mips/rmi/pcibus.h>
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