Date: Wed, 3 Oct 2018 11:42:08 -0700 From: glenn <pygr@sonic.net> To: freebsd-arm@freebsd.org Subject: Re: ClearFog Base -- "status: no carrier" for mvneta1 Message-ID: <AE738977-F1C8-4F8A-9E42-FD4CFD9317E8@sonic.net> In-Reply-To: <mailman.57.1538568001.62956.freebsd-arm@freebsd.org> References: <mailman.57.1538568001.62956.freebsd-arm@freebsd.org>
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Hi Luiz and Marcin, Thank you for taking an interest in this. I have looked into the problem further (Google is your friend) and made = progress. After modification of the u-boot source before build, the = message =E2=80=9Cstatus: no carrier=E2=80=9D for the second ethernet = port no longer appears . The recipe is detailed in the last post in this = thread: = http://forum.solid-run.com/linux-kernel-and-bootloaders-f34/port-light-is-= always-on-does-not-work-t3074.html = <http://forum.solid-run.com/linux-kernel-and-bootloaders-f34/port-light-is= -always-on-does-not-work-t3074.html>.=20 It was a surprise to me that modifying u-boot code affected the = functioning of the ethernet after control was passed to the OS. = Apparently some functionality that is built into u-boot continues to be = used by the OS. In addition to the changes in u-boot mentioned above, the = armada-388-clearfog-base.dts was edited to allow the serial console to = function. The second line in serial@12000 { compatible =3D "marvell,armada-38x-uart=E2=80=9D; was changed to=20 compatible =3D "snps,dw-apb-uart=E2=80=9D;=20 I=E2=80=99m thinking the reason that that enabled the serial console is = that FreeBSD doesn=E2=80=99t have a driver that responds to = "marvell,armada-38x-uart=E2=80=9D but does have one that responds to = "snps,dw-apb-uart=E2=80=9D. Glenn > Date: Tue, 2 Oct 2018 11:57:32 -0300 > From: Luiz Otavio O Souza <lists.br@gmail.com> > To: Marcin Wojtas <mw@semihalf.com> > Cc: pygr@sonic.net, "freebsd-arm@freebsd.org" > <freebsd-arm@freebsd.org> > Subject: Re: ClearFog Base -- "status: no carrier" for mvneta1 > Message-ID: > = <CAB=3D2f8z0GumRUQB7gbV4wLLVuk6BRf3pu6JSAP3sOhpoXdstsw@mail.gmail.com> > Content-Type: text/plain; charset=3D"UTF-8" >=20 > On Tue, 2 Oct 2018 at 00:43, Marcin Wojtas wrote: >>=20 >> Hi Glenn, >>=20 >> I can see, that armada-388-clearfog-base.dts connects eth1 to a PHY = via MDIO. >> Unfortunately my Clearfog boards have the SFP cage connected only to >> the SGMII lanes only (no PHY). >>=20 >> Can you please try to boot with armada-388-clearfog.dts, where the = SFP >> cage is configured as the 'fixed-link' and let know? >=20 > I don't have the Clearfog Base here, but this board has the PHY1 reset > connected to GPIO pin 19, you probably want to check this too. >=20 > Luiz >=20
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