Date: Sun, 26 Apr 2020 19:17:45 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r360350 - head/contrib/llvm-project/llvm/lib/Target/ARM Message-ID: <202004261917.03QJHja8007407@repo.freebsd.org>
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Author: dim Date: Sun Apr 26 19:17:45 2020 New Revision: 360350 URL: https://svnweb.freebsd.org/changeset/base/360350 Log: Tentatively apply https://reviews.llvm.org/D78877 (by Dave Green): [ARM] Only produce qadd8b under hasV6Ops When compiling for a arm5te cpu from clang, the +dsp attribute is set. This meant we could try and generate qadd8 instructions where we would end up having no pattern. I've changed the condition here to be hasV6Ops && hasDSP, which is what other parts of ARMISelLowering seem to use for similar instructions. Fixed PR45677. This fixes "fatal error: error in backend: Cannot select: t37: i32 = ARMISD::QADD8b t43, t44" when compiling sys/dev/sound/pcm/feeder_mixer.c for armv5. For some reason we do not encounter this on head, but this error popped up while building universes for stable/12. MFC after: 3 days Modified: head/contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp Modified: head/contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp ============================================================================== --- head/contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp Sun Apr 26 18:42:38 2020 (r360349) +++ head/contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp Sun Apr 26 19:17:45 2020 (r360350) @@ -4549,7 +4549,7 @@ SDValue ARMTargetLowering::LowerUnsignedALUO(SDValue O static SDValue LowerSADDSUBSAT(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *Subtarget) { EVT VT = Op.getValueType(); - if (!Subtarget->hasDSP()) + if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) return SDValue(); if (!VT.isSimple()) return SDValue();
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