Date: Sun, 6 Oct 2024 21:14:24 +0200 From: Stefan Hegnauer <stefan.hegnauer@gmx.ch> To: Warner Losh <imp@bsdimp.com> Cc: freebsd-stable@freebsd.org Subject: Re: APU1 bricked on stable/14 - solved Message-ID: <f12072f3-3b4e-4e63-a91b-802d59a0e873@gmx.ch> In-Reply-To: <CANCZdfqZ_byx5aQsybVDriitWezTL43ix7Vajh-i1DKPRtg_7g@mail.gmail.com> References: <feaff803-ae93-4e9b-a8e6-1498d7b07b69@gmx.ch> <CANCZdfqZ_byx5aQsybVDriitWezTL43ix7Vajh-i1DKPRtg_7g@mail.gmail.com>
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[-- Attachment #1 --] On 06.10.2024 15:47, Warner Losh wrote: > > > On Sun, Oct 6, 2024 at 6:35 AM Stefan Hegnauer > <stefan.hegnauer@gmx.ch> wrote: > > I have a few pc-engines APU1 appliances running in headless mode under > Nanobsd. Maintenance is by means of direct COM port connection. > After a recent update a few weeks back I was not able to connect > by COM > port anymore - console output and input went away after booting and > before single- or multi-user mode would start. Even re-flashing the > SDcard with a fresh image did not help. > > After some longish trials and errors it turned out that both > - commit 74b9fc7a 'amd64 GENERIC: Switch uart hints from "isa" to > "acpi"' as well as > - commit 4ba4cfaf 'acpi: Narrow workaround for broken interrupt > settings > on x86' > broke things for me. Restoring hints and setting > hw.acpi.override_isa_irq_polarity=1 in /boot/loader.conf.local > restored > working order. > > I agree that APU1 is EOL, however I would have expected an entry to > UPDATING for such a POLA violation. > > > Likely, but really really old gear like this is going to hit edge > cases that > developers haven't seen. The hint thing wasn't though to actually > negatively > affect any deployed hardware since it dealt with details that changed > 15 or > 20 years ago... > > Looks like the APU1 used coreboot which at the time was trailing > adaptation > of ACPI, so it makes sense... I knew that Soekris boxes had issues, > but they > are another 5 or 10 years older than the APUs and mine sadly isn't > operational. > > So I can write a better UPDATING entry, can you share with me the dmesg > from both APU1 and APU2? > > Warner > > Note that pc-engines APU2 models are not affected as the BIOS ACPI > tables contain correct UART descriptions. > > - Stefan > Warner: thanks for the quick reply. Not so really, really old in my view - the BIOS is from ~August 2022 (APU1). And yes, it uses coreboot: PC Engines apu1 coreboot build 20220822 BIOS version v4.17.0.3 SeaBIOS (version rel-1.16.0.1-0-g77603a32) From verbose boot, dmesg -a: - APU1, original/faulty from today: https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_std.txt - APU1, fixed in loader.conf.local: https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_fixed.txt - APU2 (has no problems): https://hegnauer.selfhost.eu/web/computing/apu2d4_3mdeb_v4_19_0_1.txt Let me know if you need additional information. - Stefan [-- Attachment #2 --] <!DOCTYPE html> <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> </head> <body> <font face="monospace">On 06.10.2024 15:47, Warner Losh wrote:<br> </font> <blockquote type="cite" cite="mid:CANCZdfqZ_byx5aQsybVDriitWezTL43ix7Vajh-i1DKPRtg_7g@mail.gmail.com"> <meta http-equiv="content-type" content="text/html; charset=UTF-8"> <div dir="ltr"> <div dir="ltr"><font face="monospace"><br> </font></div> <font face="monospace"><br> </font> <div class="gmail_quote"> <div dir="ltr" class="gmail_attr"><font face="monospace">On Sun, Oct 6, 2024 at 6:35 AM Stefan Hegnauer <<a href="mailto:stefan.hegnauer@gmx.ch" moz-do-not-send="true" class="moz-txt-link-freetext">stefan.hegnauer@gmx.ch</a>> wrote:<br> </font></div> <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><font face="monospace">I have a few pc-engines APU1 appliances running in headless mode under<br> Nanobsd. Maintenance is by means of direct COM port connection.<br> After a recent update a few weeks back I was not able to connect by COM<br> port anymore - console output and input went away after booting and<br> before single- or multi-user mode would start. Even re-flashing the<br> SDcard with a fresh image did not help.<br> </font> <font face="monospace"><br> After some longish trials and errors it turned out that both<br> - commit 74b9fc7a 'amd64 GENERIC: Switch uart hints from "isa" to<br> "acpi"' as well as<br> - commit 4ba4cfaf 'acpi: Narrow workaround for broken interrupt settings<br> on x86'<br> broke things for me. Restoring hints and setting<br> hw.acpi.override_isa_irq_polarity=1 in /boot/loader.conf.local restored<br> working order.<br> </font> <font face="monospace"><br> I agree that APU1 is EOL, however I would have expected an entry to<br> UPDATING for such a POLA violation.<br> </font></blockquote> <div><font face="monospace"><br> </font></div> <div><font face="monospace">Likely, but really really old gear like this is going to hit edge cases that</font></div> <div><font face="monospace">developers haven't seen. The hint thing wasn't though to actually negatively</font></div> <div><font face="monospace">affect any deployed hardware since it dealt with details that changed 15 or</font></div> <div><font face="monospace">20 years ago...</font></div> <div><font face="monospace"><br> </font></div> <div><font face="monospace">Looks like the APU1 used coreboot which at the time was trailing adaptation</font></div> <div><font face="monospace">of ACPI, so it makes sense... I knew that Soekris boxes had issues, but they</font></div> <div><font face="monospace">are another 5 or 10 years older than the APUs and mine sadly isn't operational.</font></div> <div><font face="monospace"><br> </font></div> <div><font face="monospace">So I can write a better UPDATING entry, can you share with me the dmesg</font></div> <div><font face="monospace">from both APU1 and APU2?</font></div> <div><font face="monospace"><br> </font></div> <div><font face="monospace">Warner</font></div> <div><font face="monospace"> </font></div> <blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><font face="monospace"> Note that pc-engines APU2 models are not affected as the BIOS ACPI<br> tables contain correct UART descriptions.<br> </font> <font face="monospace"><br> - Stefan<br> </font> <font face="monospace"><br> </font> </blockquote> </div> </div> </blockquote> <font face="monospace">Warner: thanks for the quick reply. Not so really, really old in my view - the BIOS is from ~August 2022 (APU1). And yes, it uses coreboot:<br> PC Engines apu1<br> coreboot build 20220822<br> BIOS version v4.17.0.3<br> SeaBIOS (version rel-1.16.0.1-0-g77603a32)<br> <br> From verbose boot, dmesg -a:<br> - APU1, original/faulty from today: <a moz-do-not-send="true" href="https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_std.txt" class="moz-txt-link-freetext">https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_std.txt</a><br>; - APU1, fixed in loader.conf.local: <a moz-do-not-send="true" href="https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_fixed.txt" class="moz-txt-link-freetext">https://hegnauer.selfhost.eu/web/computing/apu1c4_3mdeb_v4_17_0_3_fixed.txt</a><br>; - APU2 (has no problems): <a moz-do-not-send="true" href="https://hegnauer.selfhost.eu/web/computing/apu2d4_3mdeb_v4_19_0_1.txt" class="moz-txt-link-freetext">https://hegnauer.selfhost.eu/web/computing/apu2d4_3mdeb_v4_19_0_1.txt</a><br>; <br> Let me know if you need additional information.<br> <br> - Stefan<br> </font> </body> </html>help
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