Date: Thu, 4 Sep 2014 01:56:15 +0000 (UTC) From: John Baldwin <jhb@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r271077 - in head/sys: amd64/amd64 i386/i386 Message-ID: <201409040156.s841uFl5002928@svn.freebsd.org>
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Author: jhb Date: Thu Sep 4 01:56:15 2014 New Revision: 271077 URL: http://svnweb.freebsd.org/changeset/base/271077 Log: Remove trailing whitespace. Modified: head/sys/amd64/amd64/identcpu.c head/sys/i386/i386/identcpu.c Modified: head/sys/amd64/amd64/identcpu.c ============================================================================== --- head/sys/amd64/amd64/identcpu.c Thu Sep 4 01:46:06 2014 (r271076) +++ head/sys/amd64/amd64/identcpu.c Thu Sep 4 01:56:15 2014 (r271077) @@ -97,11 +97,11 @@ SYSCTL_PROC(_hw, HW_MACHINE, machine, CT NULL, 0, sysctl_hw_machine, "A", "Machine class"); static char cpu_model[128]; -SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, +SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model"); static int hw_clockrate; -SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, +SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, &hw_clockrate, 0, "CPU instruction clock rate"); static eventhandler_tag tsc_post_tag; @@ -686,15 +686,15 @@ print_AMD_info(void) printf("L2 unified cache: %d kbytes", regs[2] >> 16); printf(", %d bytes/line", regs[2] & 0xff); printf(", %d lines/tag", (regs[2] >> 8) & 0x0f); - print_AMD_l2_assoc((regs[2] >> 12) & 0x0f); + print_AMD_l2_assoc((regs[2] >> 12) & 0x0f); } /* - * Opteron Rev E shows a bug as in very rare occasions a read memory - * barrier is not performed as expected if it is followed by a - * non-atomic read-modify-write instruction. + * Opteron Rev E shows a bug as in very rare occasions a read memory + * barrier is not performed as expected if it is followed by a + * non-atomic read-modify-write instruction. * As long as that bug pops up very rarely (intensive machine usage - * on other operating systems generally generates one unexplainable + * on other operating systems generally generates one unexplainable * crash any 2 months) and as long as a model specific fix would be * impratical at this stage, print out a warning string if the broken * model and family are identified. @@ -910,7 +910,7 @@ print_vmx_info(void) "\012single" /* INVVPID single-context type */ "\013all" /* INVVPID all-context type */ /* INVVPID single-context-retaining-globals type */ - "\014single-globals" + "\014single-globals" ); } } Modified: head/sys/i386/i386/identcpu.c ============================================================================== --- head/sys/i386/i386/identcpu.c Thu Sep 4 01:46:06 2014 (r271076) +++ head/sys/i386/i386/identcpu.c Thu Sep 4 01:56:15 2014 (r271077) @@ -75,15 +75,15 @@ static void print_via_padlock_info(void) int cpu_class; char machine[] = MACHINE; -SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, +SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "Machine class"); static char cpu_model[128]; -SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, +SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, "Machine model"); static int hw_clockrate; -SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, +SYSCTL_INT(_hw, OID_AUTO, clockrate, CTLFLAG_RD, &hw_clockrate, 0, "CPU instruction clock rate"); static eventhandler_tag tsc_post_tag; @@ -1270,7 +1270,7 @@ print_AMD_info(void) printf("L2 internal cache: %d kbytes", regs[2] >> 16); printf(", %d bytes/line", regs[2] & 0xff); printf(", %d lines/tag", (regs[2] >> 8) & 0x0f); - print_AMD_assoc((regs[2] >> 12) & 0x0f); + print_AMD_assoc((regs[2] >> 12) & 0x0f); } } if (((cpu_id & 0xf00) == 0x500)
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