Date: Thu, 23 Jan 2025 17:27:25 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 4e3831c66d00 - main - arm64: fix ID_AA64ISAR2_WFxT_IMPL value Message-ID: <202501231727.50NHRPfH022383@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=4e3831c66d00db6b2aae17bea200ba9dc7720cad commit 4e3831c66d00db6b2aae17bea200ba9dc7720cad Author: Harry Moulton <harry.moulton@arm.com> AuthorDate: 2025-01-23 12:23:09 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2025-01-23 17:26:25 +0000 arm64: fix ID_AA64ISAR2_WFxT_IMPL value Bits 3:0 of ID_AA64ISAR2_EL1 are reserved for FEAT_WFxT in ARMv8.7, with bit 1 used to determine whether the feature is supported. The macro, ID_AA64ISAR2_WFxT_IMPL can be used to check if this bit is set, however it is currently incorrectly set to check bit 0. This has now been corrected. Reviewed by: andrew Sponsored by: Arm Ltd Signed-off-by: Harry Moulton <harry.moulton@arm.com> Differential Revision: https://reviews.freebsd.org/D48577 --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index e955f3f4a5c0..d586d3568bd7 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -1124,7 +1124,7 @@ #define ID_AA64ISAR2_WFxT_MASK (UL(0xf) << ID_AA64ISAR2_WFxT_SHIFT) #define ID_AA64ISAR2_WFxT_VAL(x) ((x) & ID_AA64ISAR2_WFxT_MASK) #define ID_AA64ISAR2_WFxT_NONE (UL(0x0) << ID_AA64ISAR2_WFxT_SHIFT) -#define ID_AA64ISAR2_WFxT_IMPL (UL(0x1) << ID_AA64ISAR2_WFxT_SHIFT) +#define ID_AA64ISAR2_WFxT_IMPL (UL(0x2) << ID_AA64ISAR2_WFxT_SHIFT) #define ID_AA64ISAR2_RPRES_SHIFT 4 #define ID_AA64ISAR2_RPRES_WIDTH 4 #define ID_AA64ISAR2_RPRES_MASK (UL(0xf) << ID_AA64ISAR2_RPRES_SHIFT)
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