Date: Thu, 9 Aug 2018 21:28:31 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r337552 - in head: lib/clang lib/clang/include/llvm/Config lib/clang/libllvm share/man/man5 share/mk tools/build/options Message-ID: <201808092128.w79LSVPC083077@repo.freebsd.org>
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Author: dim Date: Thu Aug 9 21:28:31 2018 New Revision: 337552 URL: https://svnweb.freebsd.org/changeset/base/337552 Log: Add optional LLVM BPF target support BPF (eBPF) is an independent instruction set architecture which is introduced in Linux a few years ago. Originally, eBPF execute environment was only inside Linux kernel. However, recent years there are some user space implementation (https://github.com/iovisor/ubpf, https://doc.dpdk.org/guides/prog_guide/bpf_lib.html) and kernel space implementation for FreeBSD is going on (https://github.com/YutaroHayakawa/generic-ebpf). The BPF target support can be enabled using WITH_LLVM_TARGET_BPF, as it is not built by default. Submitted by: Yutaro Hayakawa <yhayakawa3720@gmail.com> Reviewed by: dim, bdrewery Differential Revision: https://reviews.freebsd.org/D16033 Added: head/tools/build/options/WITH_LLVM_TARGET_BPF (contents, props changed) Modified: head/lib/clang/include/llvm/Config/AsmParsers.def head/lib/clang/include/llvm/Config/AsmPrinters.def head/lib/clang/include/llvm/Config/Disassemblers.def head/lib/clang/include/llvm/Config/Targets.def head/lib/clang/libllvm/Makefile head/lib/clang/llvm.build.mk head/share/man/man5/src.conf.5 head/share/mk/src.opts.mk Modified: head/lib/clang/include/llvm/Config/AsmParsers.def ============================================================================== --- head/lib/clang/include/llvm/Config/AsmParsers.def Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/include/llvm/Config/AsmParsers.def Thu Aug 9 21:28:31 2018 (r337552) @@ -10,6 +10,9 @@ LLVM_ASM_PARSER(AArch64) #ifdef LLVM_TARGET_ENABLE_ARM LLVM_ASM_PARSER(ARM) #endif +#ifdef LLVM_TARGET_ENABLE_BPF +LLVM_ASM_PARSER(BPF) +#endif #ifdef LLVM_TARGET_ENABLE_MIPS LLVM_ASM_PARSER(Mips) #endif Modified: head/lib/clang/include/llvm/Config/AsmPrinters.def ============================================================================== --- head/lib/clang/include/llvm/Config/AsmPrinters.def Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/include/llvm/Config/AsmPrinters.def Thu Aug 9 21:28:31 2018 (r337552) @@ -10,6 +10,9 @@ LLVM_ASM_PRINTER(AArch64) #ifdef LLVM_TARGET_ENABLE_ARM LLVM_ASM_PRINTER(ARM) #endif +#ifdef LLVM_TARGET_ENABLE_BPF +LLVM_ASM_PRINTER(BPF) +#endif #ifdef LLVM_TARGET_ENABLE_MIPS LLVM_ASM_PRINTER(Mips) #endif Modified: head/lib/clang/include/llvm/Config/Disassemblers.def ============================================================================== --- head/lib/clang/include/llvm/Config/Disassemblers.def Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/include/llvm/Config/Disassemblers.def Thu Aug 9 21:28:31 2018 (r337552) @@ -10,6 +10,9 @@ LLVM_DISASSEMBLER(AArch64) #ifdef LLVM_TARGET_ENABLE_ARM LLVM_DISASSEMBLER(ARM) #endif +#ifdef LLVM_TARGET_ENABLE_BPF +LLVM_DISASSEMBLER(BPF) +#endif #ifdef LLVM_TARGET_ENABLE_MIPS LLVM_DISASSEMBLER(Mips) #endif Modified: head/lib/clang/include/llvm/Config/Targets.def ============================================================================== --- head/lib/clang/include/llvm/Config/Targets.def Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/include/llvm/Config/Targets.def Thu Aug 9 21:28:31 2018 (r337552) @@ -10,6 +10,9 @@ LLVM_TARGET(AArch64) #ifdef LLVM_TARGET_ENABLE_ARM LLVM_TARGET(ARM) #endif +#ifdef LLVM_TARGET_ENABLE_BPF +LLVM_TARGET(BPF) +#endif #ifdef LLVM_TARGET_ENABLE_MIPS LLVM_TARGET(Mips) #endif Modified: head/lib/clang/libllvm/Makefile ============================================================================== --- head/lib/clang/libllvm/Makefile Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/libllvm/Makefile Thu Aug 9 21:28:31 2018 (r337552) @@ -9,14 +9,15 @@ INTERNALLIB= CFLAGS+= -I${.OBJDIR} .if ${MK_LLVM_TARGET_AARCH64} == "no" && ${MK_LLVM_TARGET_ARM} == "no" && \ - ${MK_LLVM_TARGET_MIPS} == "no" && ${MK_LLVM_TARGET_POWERPC} == "no" && \ - ${MK_LLVM_TARGET_SPARC} == "no" && ${MK_LLVM_TARGET_X86} == "no" + ${MK_LLVM_TARGET_BPF} == "no" && ${MK_LLVM_TARGET_MIPS} == "no" && \ + ${MK_LLVM_TARGET_POWERPC} == "no" && ${MK_LLVM_TARGET_SPARC} == "no" && \ + ${MK_LLVM_TARGET_X86} == "no" .error Please enable at least one of: MK_LLVM_TARGET_AARCH64,\ - MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_MIPS, MK_LLVM_TARGET_POWERPC,\ - MK_LLVM_TARGET_SPARC, or MK_LLVM_TARGET_X86 + MK_LLVM_TARGET_ARM, MK_LLVM_TARGET_BPF, MK_LLVM_TARGET_MIPS, \ + MK_LLVM_TARGET_POWERPC, MK_LLVM_TARGET_SPARC, or MK_LLVM_TARGET_X86 .endif -.for arch in AArch64 ARM Mips PowerPC Sparc X86 +.for arch in AArch64 ARM BPF Mips PowerPC Sparc X86 . if ${MK_LLVM_TARGET_${arch:tu}} != "no" CFLAGS+= -I${LLVM_SRCS}/lib/Target/${arch} . endif @@ -905,6 +906,25 @@ SRCS_MIN+= Target/ARM/Thumb2SizeReduction.cpp SRCS_MIN+= Target/ARM/ThumbRegisterInfo.cpp SRCS_MIN+= Target/ARM/Utils/ARMBaseInfo.cpp .endif # MK_LLVM_TARGET_ARM +.if ${MK_LLVM_TARGET_BPF} != "no" +SRCS_MIN+= Target/BPF/AsmParser/BPFAsmParser.cpp +SRCS_MIN+= Target/BPF/BPFAsmPrinter.cpp +SRCS_MIN+= Target/BPF/BPFFrameLowering.cpp +SRCS_MIN+= Target/BPF/BPFISelDAGToDAG.cpp +SRCS_MIN+= Target/BPF/BPFISelLowering.cpp +SRCS_MIN+= Target/BPF/BPFInstrInfo.cpp +SRCS_MIN+= Target/BPF/BPFMCInstLower.cpp +SRCS_MIN+= Target/BPF/BPFRegisterInfo.cpp +SRCS_MIN+= Target/BPF/BPFSubtarget.cpp +SRCS_MIN+= Target/BPF/BPFTargetMachine.cpp +SRCS_MIN+= Target/BPF/Disassembler/BPFDisassembler.cpp +SRCS_MIN+= Target/BPF/InstPrinter/BPFInstPrinter.cpp +SRCS_MIN+= Target/BPF/MCTargetDesc/BPFAsmBackend.cpp +SRCS_MIN+= Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp +SRCS_MIN+= Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp +SRCS_MIN+= Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp +SRCS_MIN+= Target/BPF/TargetInfo/BPFTargetInfo.cpp +.endif # MK_LLVM_TARGET_BPF .if ${MK_LLVM_TARGET_MIPS} != "no" SRCS_MIN+= Target/Mips/AsmParser/MipsAsmParser.cpp SRCS_XDW+= Target/Mips/Disassembler/MipsDisassembler.cpp @@ -1371,7 +1391,7 @@ beforebuild: # Note: some rules are superfluous, not every combination is valid. .for arch in \ - AArch64/AArch64 ARM/ARM Mips/Mips PowerPC/PPC Sparc/Sparc X86/X86 + AArch64/AArch64 ARM/ARM BPF/BPF Mips/Mips PowerPC/PPC Sparc/Sparc X86/X86 . for hdr in \ AsmMatcher/-gen-asm-matcher \ AsmWriter1/-gen-asm-writer,-asmwriternum=1 \ @@ -1431,6 +1451,17 @@ TGHDRS+= ARMGenRegisterInfo.inc TGHDRS+= ARMGenSubtargetInfo.inc TGHDRS+= ARMGenSystemRegister.inc .endif # MK_LLVM_TARGET_ARM +.if ${MK_LLVM_TARGET_BPF} != "no" +TGHDRS+= BPFGenAsmMatcher.inc +TGHDRS+= BPFGenAsmWriter.inc +TGHDRS+= BPFGenCallingConv.inc +TGHDRS+= BPFGenDAGISel.inc +TGHDRS+= BPFGenDisassemblerTables.inc +TGHDRS+= BPFGenInstrInfo.inc +TGHDRS+= BPFGenMCCodeEmitter.inc +TGHDRS+= BPFGenRegisterInfo.inc +TGHDRS+= BPFGenSubtargetInfo.inc +.endif # MK_LLVM_TARGET_BPF .if ${MK_LLVM_TARGET_MIPS} != "no" TGHDRS+= MipsGenAsmMatcher.inc TGHDRS+= MipsGenAsmWriter.inc Modified: head/lib/clang/llvm.build.mk ============================================================================== --- head/lib/clang/llvm.build.mk Thu Aug 9 21:20:07 2018 (r337551) +++ head/lib/clang/llvm.build.mk Thu Aug 9 21:28:31 2018 (r337552) @@ -54,6 +54,9 @@ CFLAGS+= -DLLVM_TARGET_ENABLE_ARM LLVM_NATIVE_ARCH= ARM . endif .endif +.if ${MK_LLVM_TARGET_BPF} != "no" +CFLAGS+= -DLLVM_TARGET_ENABLE_BPF +.endif .if ${MK_LLVM_TARGET_MIPS} != "no" CFLAGS+= -DLLVM_TARGET_ENABLE_MIPS . if ${MACHINE_CPUARCH} == "mips" Modified: head/share/man/man5/src.conf.5 ============================================================================== --- head/share/man/man5/src.conf.5 Thu Aug 9 21:20:07 2018 (r337551) +++ head/share/man/man5/src.conf.5 Thu Aug 9 21:28:31 2018 (r337552) @@ -1,6 +1,6 @@ .\" DO NOT EDIT-- this file is @generated by tools/build/options/makeman. .\" $FreeBSD$ -.Dd August 2, 2018 +.Dd August 9, 2018 .Dt SRC.CONF 5 .Os .Sh NAME @@ -1110,6 +1110,11 @@ option should be used rather than this in most cases. .Pp This is a default setting on amd64/amd64, arm/arm, arm/armv6, arm/armv7, arm64/aarch64, i386/i386, mips/mipsel, mips/mips, mips/mips64el, mips/mips64, mips/mipsn32, mips/mipselhf, mips/mipshf, mips/mips64elhf, mips/mips64hf, powerpc/powerpc, powerpc/powerpc64 and powerpc/powerpcspe. +.It Va WITH_LLVM_TARGET_BPF +Set to build LLVM target support for BPF. +The +.Va LLVM_TARGET_ALL +option should be used rather than this in most cases. .It Va WITHOUT_LLVM_TARGET_MIPS Set to not build LLVM target support for MIPS. The Modified: head/share/mk/src.opts.mk ============================================================================== --- head/share/mk/src.opts.mk Thu Aug 9 21:20:07 2018 (r337551) +++ head/share/mk/src.opts.mk Thu Aug 9 21:28:31 2018 (r337552) @@ -275,6 +275,8 @@ __DEFAULT_DEPENDENT_OPTIONS+= LLVM_TARGET_${__llt:${__ .endif .endfor +__DEFAULT_NO_OPTIONS+=LLVM_TARGET_BPF + .include <bsd.compiler.mk> # If the compiler is not C++11 capable, disable Clang and use GCC instead. # This means that architectures that have GCC 4.2 as default can not Added: head/tools/build/options/WITH_LLVM_TARGET_BPF ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/tools/build/options/WITH_LLVM_TARGET_BPF Thu Aug 9 21:28:31 2018 (r337552) @@ -0,0 +1,5 @@ +.\" $FreeBSD$ +Set to build LLVM target support for BPF. +The +.Va LLVM_TARGET_ALL +option should be used rather than this in most cases.
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