Date: Fri, 29 Sep 1995 15:16:21 +0100 From: se@zpr.uni-koeln.de (Stefan Esser) To: Jim Lowe <james@miller.cs.uwm.edu> Cc: current@freebsd.org Subject: Re: Pci bus timing problems Message-ID: <199509291416.AA14839@Sysiphos> In-Reply-To: Jim Lowe <james@miller.cs.uwm.edu> "Re: Pci bus timing problems" (Sep 28, 21:19)
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On Sep 28, 21:19, Jim Lowe wrote: } Subject: Re: Pci bus timing problems } I must have booted the system wrong or something. Sorry about that. } I set bootverbose in machdep.c and rebooted the system (I am at home } right now). Attached are the 1.14 boot and the 1.15 boot. Thanks ! } Aside from this, did you write an mpeg encoder/decoder at some time } in the past or was I thinking of someone else? Sorry, no, not that I remember :) =========================================== Ok.Now lets see: First I'll look at rev. 1.15: } pcibus_setup(1): mode1res=0x80000000 (0x80000000), mode2res=0xff (0x0e) } pcibus_setup(2): mode1res=0x80000000 (0x80000000) } pcibus_check: device 0 is there The sequence of input/output operations was: oldval = inl(0x0cf8); outl(0x0cf8, 0x80000000); /* ignored by config mechanism 1 device */ outb(0x0cf8, 0x0e); /* ignored by config mechanism 2 device */ mode1res = inl(0x0cf8); /* => 0x80000000, OK (mech 1) */ mode2res = inb(0x0cf8); /* => 0xff, not OK (mech 2) */ outl(0x0cf8, oldval); /* at this point it is known, that there * is something at the PCI specific port * address, if either the byte or the long * has been read back unmodified ... */ outl(0x0cf8, 0x80000000); outb(0x0cfd, 0); /* ignored by mechanism 1 device */ mode1res = inl(0x0cf8); /* != 0 => this is a mechanism 1 device */ outl(0x0cf8, oldval); /* the device has been identified as a PCI * spec conformant config mechanism 1 chip, * since the outb( ,0) was unable to clear * the MSB ... */ =========================================== Now compare with what 1.14 did: oldval = inl(0x0cf8); outl(0x0cf8, 0xf0000001); outb(0x0cfd, 0); result = inl(0x0cf8); /* mechanism 1, if result has MSB set and LSB clear */ outl(0x0cf8, oldval); =========================================== Hmmm, seems the only difference in 1.15 is the outb(0x0cf8,0x0e), which seems to be ignored by the host bridge (as required by the PCI specs). It really should not be visible to the Meteor! The Meteor is a purely memory mapped device, according to the probe info: } meteor0 <Matrox Meteor> rev 0 int a irq 10 on pci0:18 } mapreg[10] type=0 addr=ffbdd000 size=1000. } reg16: virtual=0xf4744000 physical=0xffbdd000 size=0x1000 Well, you might try to remove the outb(,0x0e): oldval = inl (CONF1_ADDR_PORT); outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); /* outb (CONF2_ENABLE_PORT, CONF2_ENABLE_CHK);*/ mode1res = inl(CONF1_ADDR_PORT); mode2res = 0xff /*inb(CONF2_ENABLE_PORT)*/; outl (CONF1_ADDR_PORT, oldval); And retry this modified 1.15 code (it can't stay that way, since then mechanism 2 boards rely on the outb() to be probed correctly !). Regards, STefan -- Stefan Esser, Zentrum fuer Paralleles Rechnen Tel: +49 221 4706021 Universitaet zu Koeln, Weyertal 80, 50931 Koeln FAX: +49 221 4705160 ============================================================================== http://www.zpr.uni-koeln.de/staff/esser/esser.html <se@ZPR.Uni-Koeln.DE>
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