Date: Wed, 4 Dec 2019 18:38:50 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r355397 - head/contrib/llvm/lib/Target/PowerPC Message-ID: <201912041838.xB4IcoEN011952@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: dim Date: Wed Dec 4 18:38:50 2019 New Revision: 355397 URL: https://svnweb.freebsd.org/changeset/base/355397 Log: Merge commit 241cbf201 from llvm git (by Nemanja Ivanovic): [PowerPC] Fix crash in peephole optimization When converting reg+reg shifts to reg+imm rotates, we neglect to consider the CodeGenOnly versions of the 32-bit shift mnemonics. This means we produce a rotate with missing operands which causes a crash. Committing this fix without review since it is non-controversial that the list of mnemonics to consider should include the 64-bit aliases for the exact mnemonics. Fixes PR44183. This should fix "Assertion failed: (idx < size()), function operator[], file /usr/src/contrib/llvm/include/llvm/ADT/SmallVector.h, line 153" when building the graphics/mesa-dri port for the PowerPC64 ELFv2 ABI. Reported by: Alfredo Dal'Ava Júnior <alfredo.junior@eldorado.org.br> MFC after: 1 month X-MFC-With: r353358 Modified: head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Modified: head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp ============================================================================== --- head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Wed Dec 4 18:21:29 2019 (r355396) +++ head/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Wed Dec 4 18:38:50 2019 (r355397) @@ -3529,8 +3529,10 @@ bool PPCInstrInfo::transformToImmFormFedByLI(MachineIn ForwardKilledOperandReg = MI.getOperand(ConstantOpNo).getReg(); unsigned Opc = MI.getOpcode(); - bool SpecialShift32 = - Opc == PPC::SLW || Opc == PPC::SLWo || Opc == PPC::SRW || Opc == PPC::SRWo; + bool SpecialShift32 = Opc == PPC::SLW || Opc == PPC::SLWo || + Opc == PPC::SRW || Opc == PPC::SRWo || + Opc == PPC::SLW8 || Opc == PPC::SLW8o || + Opc == PPC::SRW8 || Opc == PPC::SRW8o; bool SpecialShift64 = Opc == PPC::SLD || Opc == PPC::SLDo || Opc == PPC::SRD || Opc == PPC::SRDo; bool SetCR = Opc == PPC::SLWo || Opc == PPC::SRWo ||
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201912041838.xB4IcoEN011952>