Date: Sun, 28 Jul 2024 20:23:59 GMT From: Ruslan Bukin <br@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 12f6e0a4d2d5 - stable/14 - snd_hdspe(4): Recognize newer firmware's PCI vendor id. Message-ID: <202407282023.46SKNxXP050381@gitrepo.freebsd.org>
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The branch stable/14 has been updated by br: URL: https://cgit.FreeBSD.org/src/commit/?id=12f6e0a4d2d5e51c403a45dcaf34928572a88345 commit 12f6e0a4d2d5e51c403a45dcaf34928572a88345 Author: Florian Walpen <dev@submerge.ch> AuthorDate: 2024-04-27 08:48:37 +0000 Commit: Ruslan Bukin <br@FreeBSD.org> CommitDate: 2024-07-28 20:23:07 +0000 snd_hdspe(4): Recognize newer firmware's PCI vendor id. At least for HDSPe RayDAT cards, newer firmware comes with RME's own PCI vendor id instead of the Xilinx one. Other HDSPe cards are probably also affected. Update snd_hdspe(4) to recognize both the old Xilinx and the new RME vendor ids. Differential Revision: https://reviews.freebsd.org/D44978 MFC after: 1 day (cherry picked from commit 9718d4ab99386918f5b5c207c58289eaade20623) --- sys/dev/sound/pci/hdspe.c | 3 ++- sys/dev/sound/pci/hdspe.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/sys/dev/sound/pci/hdspe.c b/sys/dev/sound/pci/hdspe.c index 91d1f3ee1bf6..0b378cc3d8f4 100644 --- a/sys/dev/sound/pci/hdspe.c +++ b/sys/dev/sound/pci/hdspe.c @@ -395,7 +395,8 @@ hdspe_probe(device_t dev) { uint32_t rev; - if (pci_get_vendor(dev) == PCI_VENDOR_XILINX && + if ((pci_get_vendor(dev) == PCI_VENDOR_XILINX || + pci_get_vendor(dev) == PCI_VENDOR_RME) && pci_get_device(dev) == PCI_DEVICE_XILINX_HDSPE) { rev = pci_get_revid(dev); switch (rev) { diff --git a/sys/dev/sound/pci/hdspe.h b/sys/dev/sound/pci/hdspe.h index d5d8dd46e580..56b928b23abd 100644 --- a/sys/dev/sound/pci/hdspe.h +++ b/sys/dev/sound/pci/hdspe.h @@ -28,6 +28,7 @@ */ #define PCI_VENDOR_XILINX 0x10ee +#define PCI_VENDOR_RME 0x1d18 /* Newer firmware versions. */ #define PCI_DEVICE_XILINX_HDSPE 0x3fc6 /* AIO, MADI, AES, RayDAT */ #define PCI_CLASS_REVISION 0x08 #define PCI_REVISION_AIO 212
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