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Date:      Wed, 15 Apr 2020 12:10:44 -0700
From:      Cy Schubert <Cy.Schubert@cschubert.com>
To:        Dimitry Andric <dim@FreeBSD.org>
Cc:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   Re: svn commit: r359981 - head/contrib/llvm-project/llvm/lib/Target/PowerPC
Message-ID:  <202004151910.03FJAiZa009229@slippy.cwsent.com>
In-Reply-To: <202004151843.03FIhi1W031973@repo.freebsd.org>
References:  <202004151843.03FIhi1W031973@repo.freebsd.org>

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In message <202004151843.03FIhi1W031973@repo.freebsd.org>, Dimitry Andric 
write
s:
> Author: dim
> Date: Wed Apr 15 18:43:44 2020
> New Revision: 359981
> URL: https://svnweb.freebsd.org/changeset/base/359981
>
> Log:
>   Revert commit a9ad65a2b from llvm git (by Nemanja Ivanovic):
>   
>     [PowerPC] Change default for unaligned FP access for older subtargets
>   
>     This is a fix for https://bugs.llvm.org/show_bug.cgi?id=40554
>   
>     Some CPU's trap to the kernel on unaligned floating point access and
>     there are kernels that do not handle the interrupt. The program then
>     fails with a SIGBUS according to the PR. This just switches the
>     default for unaligned access to only allow it on recent server CPUs
>     that are known to allow this.
>   
>     Differential revision: https://reviews.llvm.org/D71954
>   
>   This upstream commit causes a compiler hang when building certain ports
>   (e.g. security/nss, multimedia/x264) for powerpc64.  The hang has been
>   reported in https://bugs.llvm.org/show_bug.cgi?id=45186, but in the mean
>   time it is more convenient to revert the commit.
>   
>   Requested by:	jhibbits
>   MFC after:	6 weeks
>   X-MFC-With:	358851
>
> Modified:
>   head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td
>   head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
>   head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h
>
> Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td
> =============================================================================
> =
> --- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td	Wed Apr 15 18:3
> 9:12 2020	(r359980)
> +++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPC.td	Wed Apr 15 18:4
> 3:44 2020	(r359981)
> @@ -166,9 +166,6 @@ def FeatureHTM : SubtargetFeature<"htm", "HasHTM", "tr
>                                    "Enable Hardware Transactional Memory inst
> ructions">;
>  def FeatureMFTB   : SubtargetFeature<"", "FeatureMFTB", "true",
>                                          "Implement mftb using the mfspr inst
> ruction">;
> -def FeatureUnalignedFloats :
> -  SubtargetFeature<"allow-unaligned-fp-access", "AllowsUnalignedFPAccess",
> -                   "true", "CPU does not trap on unaligned FP access">;
>  def FeaturePPCPreRASched:
>    SubtargetFeature<"ppc-prera-sched", "UsePPCPreRASchedStrategy", "true",
>                     "Use PowerPC pre-RA scheduling strategy">;
> @@ -255,8 +252,7 @@ def ProcessorFeatures {
>                                                    FeatureExtDiv,
>                                                    FeatureMFTB,
>                                                    DeprecatedDST,
> -                                                  FeatureTwoConstNR,
> -                                                  FeatureUnalignedFloats];
> +                                                  FeatureTwoConstNR];
>    list<SubtargetFeature> P7SpecificFeatures = [];
>    list<SubtargetFeature> P7Features =
>      !listconcat(P7InheritableFeatures, P7SpecificFeatures);
>
> Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.c
> pp
> =============================================================================
> =
> --- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
> 	Wed Apr 15 18:39:12 2020	(r359980)
> +++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
> 	Wed Apr 15 18:43:44 2020	(r359981)
> @@ -15251,9 +15251,6 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesse
> s
>    if (!VT.isSimple())
>      return false;
>  
> -  if (VT.isFloatingPoint() && !Subtarget.allowsUnalignedFPAccess())
> -    return false;
> -
>    if (VT.getSimpleVT().isVector()) {
>      if (Subtarget.hasVSX()) {
>        if (VT != MVT::v2f64 && VT != MVT::v2i64 &&
>
> Modified: head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h
> =============================================================================
> =
> --- head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h	Wed Apr
>  15 18:39:12 2020	(r359980)
> +++ head/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarget.h	Wed Apr
>  15 18:43:44 2020	(r359981)
> @@ -124,7 +124,6 @@ class PPCSubtarget : public PPCGenSubtargetInfo { (pro
>    bool IsPPC4xx;
>    bool IsPPC6xx;
>    bool FeatureMFTB;
> -  bool AllowsUnalignedFPAccess;
>    bool DeprecatedDST;
>    bool HasLazyResolverStubs;
>    bool IsLittleEndian;
> @@ -275,7 +274,6 @@ class PPCSubtarget : public PPCGenSubtargetInfo { (pro
>    bool vectorsUseTwoUnits() const {return VectorsUseTwoUnits; }
>    bool isE500() const { return IsE500; }
>    bool isFeatureMFTB() const { return FeatureMFTB; }
> -  bool allowsUnalignedFPAccess() const { return AllowsUnalignedFPAccess; }
>    bool isDeprecatedDST() const { return DeprecatedDST; }
>    bool hasICBT() const { return HasICBT; }
>    bool hasInvariantFunctionDescriptors() const {
>

I'm seeing this on amd64:

--- Target/PowerPC/PPCSubtarget.o ---
/opt/src/svn-current/contrib/llvm-project/llvm/lib/Target/PowerPC/PPCSubtarg
et.cpp:103:3: error: use of undeclared identifier 'AllowsUnalignedFPAccess'
  AllowsUnalignedFPAccess = false;
  ^

AllowsUnalignedFPAccess reference should be removed as well.


-- 
Cheers,
Cy Schubert <Cy.Schubert@cschubert.com>
FreeBSD UNIX:  <cy@FreeBSD.org>   Web:  https://FreeBSD.org
NTP:           <cy@nwtime.org>    Web:  https://nwtime.org

	The need of the many outweighs the greed of the few.





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