Date: Thu, 25 Mar 2021 17:05:18 GMT From: Leandro Lupori <luporl@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 3d0399c718b2 - main - [PowerPC64] Clear low-order bits of ARPN Message-ID: <202103251705.12PH5Iis039441@gitrepo.freebsd.org>
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The branch main has been updated by luporl: URL: https://cgit.FreeBSD.org/src/commit/?id=3d0399c718b260da087d28825069f26d4f670065 commit 3d0399c718b260da087d28825069f26d4f670065 Author: Leandro Lupori <luporl@FreeBSD.org> AuthorDate: 2021-03-25 16:30:56 +0000 Commit: Leandro Lupori <luporl@FreeBSD.org> CommitDate: 2021-03-25 17:01:57 +0000 [PowerPC64] Clear low-order bits of ARPN PowerISA 2.07B says that the low-order p-12 bits of the real page number contained in ARPN and LP fields of a PTE must be 0s and are ignored by the hardware (Book III-S, 5.7.7.1), where 2^p is the actual page size in bytes, but we were clearing only the LP field. This worked on bare metal and QEMU with KVM, that ignore these bits, but caused a kernel panic on QEMU with TCG, that expects them to be cleared. This fixes running FreeBSD with HPT superpages enabled on QEMU with TCG. MFC after: 2 weeks Sponsored by: Eldorado Research Institute (eldorado.org.br) --- sys/powerpc/aim/mmu_oea64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c index 14fea6f29a52..1aa05501bd1b 100644 --- a/sys/powerpc/aim/mmu_oea64.c +++ b/sys/powerpc/aim/mmu_oea64.c @@ -3717,7 +3717,7 @@ moea64_sp_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, pvo = pvos[i]; pvo->pvo_pte.prot = prot; - pvo->pvo_pte.pa = (pa & ~LPTE_LP_MASK) | LPTE_LP_4K_16M | + pvo->pvo_pte.pa = (pa & ~HPT_SP_MASK) | LPTE_LP_4K_16M | moea64_calc_wimg(pa, pmap_page_get_memattr(m)); if ((flags & PMAP_ENTER_WIRED) != 0) @@ -3874,7 +3874,7 @@ moea64_sp_promote(pmap_t pmap, vm_offset_t va, vm_page_t m) for (pvo = first, va_end = PVO_VADDR(pvo) + HPT_SP_SIZE; pvo != NULL && PVO_VADDR(pvo) < va_end; pvo = RB_NEXT(pvo_tree, &pmap->pmap_pvo, pvo)) { - pvo->pvo_pte.pa &= ~LPTE_LP_MASK; + pvo->pvo_pte.pa &= ADDR_POFF | ~HPT_SP_MASK; pvo->pvo_pte.pa |= LPTE_LP_4K_16M; pvo->pvo_vaddr |= PVO_LARGE; }
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