Date: Sat, 14 Jul 2012 05:46:52 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r238439 - head/sys/arm/at91 Message-ID: <201207140546.q6E5kqHC011671@svn.freebsd.org>
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Author: imp Date: Sat Jul 14 05:46:52 2012 New Revision: 238439 URL: http://svn.freebsd.org/changeset/base/238439 Log: Create common routines for configuring the serial ports and use them on all the at91rm9200 boards. Modified: head/sys/arm/at91/at91rm9200_devices.c head/sys/arm/at91/at91rm9200var.h head/sys/arm/at91/board_bwct.c head/sys/arm/at91/board_hl200.c head/sys/arm/at91/board_kb920x.c head/sys/arm/at91/board_tsc4370.c Modified: head/sys/arm/at91/at91rm9200_devices.c ============================================================================== --- head/sys/arm/at91/at91rm9200_devices.c Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/at91rm9200_devices.c Sat Jul 14 05:46:52 2012 (r238439) @@ -37,7 +37,11 @@ __FBSDID("$FreeBSD$"); #include <machine/bus.h> #include <arm/at91/at91var.h> +#include <arm/at91/at91board.h> +#include <arm/at91/at91rm92reg.h> #include <arm/at91/at91rm9200var.h> +#include <arm/at91/at91_pioreg.h> +#include <arm/at91/at91_piovar.h> /* * The AT91RM9200 uses the same silicon for both the BGA and PQFP @@ -60,3 +64,61 @@ at91rm9200_set_subtype(enum at91_soc_sub break; } } + +void +at91rm9200_config_uart(unsigned devid, unsigned unit, unsigned pinmask) +{ + + /* + * Since the USART supports RS-485 multidrop mode, it allows the + * TX pins to float. However, for RS-232 operations, we don't want + * these pins to float. Instead, they should be pulled up to avoid + * mismatches. Linux does something similar when it configures the + * TX lines. This implies that we also allow the RX lines to float + * rather than be in the state they are left in by the boot loader. + * Since they are input pins, I think that this is the right thing + * to do. + */ + + switch (devid) { + case AT91_ID_DBGU: + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA30, 0); /* DRXD */ + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA31, 1); /* DTXD */ + break; + + case AT91RM9200_ID_USART0: + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA17, 1); /* TXD0 */ + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA19, 0); /* RXD0 */ + /* CTS PA20 */ + /* RTS -- errata #39 PA21 */ + break; + + case AT91RM9200_ID_USART1: + at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PIO_PB20, 1); /* TXD1 */ + at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PIO_PB21, 0); /* RXD1 */ + /* RI - PB18 */ + /* DTR - PB19 */ + /* DCD - PB23 */ + /* CTS - PB24 */ + /* DSR - PB25 */ + /* RTS - PB26 */ + break; + + case AT91RM9200_ID_USART2: + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA22, 0); /* RXD2 */ + at91_pio_use_periph_a(AT91RM92_PIOA_BASE, AT91C_PIO_PA23, 1); /* TXD2 */ + /* CTS - PA30 B periph */ + /* RTS - PA31 B periph */ + break; + + case AT91RM9200_ID_USART3: + at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PIO_PA5, 1); /* TXD3 */ + at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PIO_PA6, 0); /* RXD3 */ + /* CTS - PB0 B periph */ + /* RTS - PB1 B periph */ + break; + + default: + break; + } +} Modified: head/sys/arm/at91/at91rm9200var.h ============================================================================== --- head/sys/arm/at91/at91rm9200var.h Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/at91rm9200var.h Sat Jul 14 05:46:52 2012 (r238439) @@ -30,4 +30,24 @@ void at91rm9200_set_subtype(enum at91_soc_subtype st); +#define AT91RM9200_ID_USART0 1 +#define AT91RM9200_ID_USART1 2 +#define AT91RM9200_ID_USART2 3 +#define AT91RM9200_ID_USART3 4 + +/* + * Serial port convenience routines + */ +/* uart pins that are wired... */ +#define AT91_UART_CTS 0x01 +#define AT91_UART_RTS 0x02 +#define AT91_UART_RI 0x04 +#define AT91_UART_DTR 0x08 +#define AT91_UART_DCD 0x10 +#define AT91_UART_DSR 0x20 + +#define AT91_ID_DBGU 0 + +void at91rm9200_config_uart(unsigned devid, unsigned unit, unsigned pinmask); + #endif /* ARM_AT91_AT91RM9200VAR_H */ Modified: head/sys/arm/at91/board_bwct.c ============================================================================== --- head/sys/arm/at91/board_bwct.c Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/board_bwct.c Sat Jul 14 05:46:52 2012 (r238439) @@ -32,10 +32,7 @@ __FBSDID("$FreeBSD$"); #include <machine/board.h> #include <arm/at91/at91board.h> #include <arm/at91/at91var.h> -#include <arm/at91/at91rm92reg.h> #include <arm/at91/at91rm9200var.h> -#include <arm/at91/at91_piovar.h> -#include <arm/at91/at91_pio_rm9200.h> BOARD_INIT long board_init(void) @@ -44,29 +41,9 @@ board_init(void) at91rm9200_set_subtype(AT91_ST_RM9200_BGA); /* - * Since the USART supports RS-485 multidrop mode, it allows the - * TX pins to float. However, for RS-232 operations, we don't want - * these pins to float. Instead, they should be pulled up to avoid - * mismatches. Linux does something similar when it configures the - * TX lines. This implies that we also allow the RX lines to float - * rather than be in the state they are left in by the boot loader. - * Since they are input pins, I think that this is the right thing - * to do. + * I don't know anything at all about this board. */ - - /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); - /* PIOA's B periph: Turn USART 3's TX/RX pins */ - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); - /* PIOB's A periph: Turn USART 1's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); - - /* Pin assignment */ + at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */ return (at91_ramsize()); } Modified: head/sys/arm/at91/board_hl200.c ============================================================================== --- head/sys/arm/at91/board_hl200.c Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/board_hl200.c Sat Jul 14 05:46:52 2012 (r238439) @@ -44,26 +44,12 @@ board_init(void) at91rm9200_set_subtype(AT91_ST_RM9200_BGA); /* - * Since the USART supports RS-485 multidrop mode, it allows the - * TX pins to float. However, for RS-232 operations, we don't want - * these pins to float. Instead, they should be pulled up to avoid - * mismatches. Linux does something similar when it configures the - * TX lines. This implies that we also allow the RX lines to float - * rather than be in the state they are left in by the boot loader. - * Since they are input pins, I think that this is the right thing - * to do. + * Unsure what all is in the HOTe HL200, but I do know there's + * one serial port that isn't DBGU. There's many other peripherals + * that need to be configured here. */ - /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); - /* PIOA's B periph: Turn USART 3's TX/RX pins */ - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); - /* PIOB's A periph: Turn USART 1's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); + at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */ return (at91_ramsize()); } Modified: head/sys/arm/at91/board_kb920x.c ============================================================================== --- head/sys/arm/at91/board_kb920x.c Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/board_kb920x.c Sat Jul 14 05:46:52 2012 (r238439) @@ -44,26 +44,15 @@ board_init(void) at91rm9200_set_subtype(AT91_ST_RM9200_PQFP); /* - * Since the USART supports RS-485 multidrop mode, it allows the - * TX pins to float. However, for RS-232 operations, we don't want - * these pins to float. Instead, they should be pulled up to avoid - * mismatches. Linux does something similar when it configures the - * TX lines. This implies that we also allow the RX lines to float - * rather than be in the state they are left in by the boot loader. - * Since they are input pins, I think that this is the right thing - * to do. + * Setup the serial ports. + * DBGU is the main one, although jumpers can make USART0 default. + * USART1 is IrDA, and USART3 is optional RS485. */ - /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); - /* PIOA's B periph: Turn USART 3's TX/RX pins */ - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); - /* PIOB's A periph: Turn USART 1's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); + at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0); /* Tx and Rx - IRDA */ + at91rm9200_config_uart(AT91RM9200_ID_USART3, 3, /* Tx, Rx, CTS, RTS - RS485 */ + AT91_UART_CTS | AT91_UART_RTS); /* MMC/SD Interface */ at91_pio_use_periph_a(AT91RM92_PIOA_BASE,AT91C_PA27_MCCK, 0); Modified: head/sys/arm/at91/board_tsc4370.c ============================================================================== --- head/sys/arm/at91/board_tsc4370.c Sat Jul 14 03:16:57 2012 (r238438) +++ head/sys/arm/at91/board_tsc4370.c Sat Jul 14 05:46:52 2012 (r238439) @@ -43,31 +43,11 @@ board_init(void) at91rm9200_set_subtype(AT91_ST_RM9200_PQFP); - /* - * Since the USART supports RS-485 multidrop mode, it allows the - * TX pins to float. However, for RS-232 operations, we don't want - * these pins to float. Instead, they should be pulled up to avoid - * mismatches. Linux does something similar when it configures the - * TX lines. This implies that we also allow the RX lines to float - * rather than be in the state they are left in by the boot loader. - * Since they are input pins, I think that this is the right thing - * to do. - */ - - /* PIOA's A periph: Turn USART 0 and 2's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA18_RXD0 | AT91C_PA22_RXD2, 0); - at91_pio_use_periph_a(AT91RM92_PIOA_BASE, - AT91C_PA17_TXD0 | AT91C_PA23_TXD2, 1); - /* PIOA's B periph: Turn USART 3's TX/RX pins */ - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA6_RXD3, 0); - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, AT91C_PA5_TXD3, 1); - /* We're using TC0's A1 and A2 input */ - at91_pio_use_periph_b(AT91RM92_PIOA_BASE, - AT91C_PA19_TIOA1 | AT91C_PA21_TIOA2, 0); - /* PIOB's A periph: Turn USART 1's TX/RX pins */ - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB21_RXD1, 0); - at91_pio_use_periph_a(AT91RM92_PIOB_BASE, AT91C_PB20_TXD1, 1); + at91rm9200_config_uart(AT91_ID_DBGU, 0, 0); /* DBGU just Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART0, 1, 0); /* Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART1, 2, 0); /* Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART2, 3, 0); /* Tx and Rx */ + at91rm9200_config_uart(AT91RM9200_ID_USART3, 4, 0); /* Tx and Rx */ /* Pin assignment */ /* Assert PA24 low -- talk to rubidium */
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