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Date:      Sat, 1 May 2010 21:59:06 +0000 (UTC)
From:      Ryan Stone <rstone@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r207482 - head/lib/libpmc
Message-ID:  <201005012159.o41Lx6OK059241@svn.freebsd.org>

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Author: rstone
Date: Sat May  1 21:59:06 2010
New Revision: 207482
URL: http://svn.freebsd.org/changeset/base/207482

Log:
  When configuring hwpmc to use the EXT_SNOOP event, only send a default cachestate qualifier on the Atom processor.  Other Intel processors do not accept a cachestate qualifier and currently hwpmc will return EINVAL if you try to use the EXT_SNOOP event on those processors
  
  Approved by:	jkoshy (mentor)
  MFC after:	2 weeks

Modified:
  head/lib/libpmc/libpmc.c

Modified: head/lib/libpmc/libpmc.c
==============================================================================
--- head/lib/libpmc/libpmc.c	Sat May  1 20:44:37 2010	(r207481)
+++ head/lib/libpmc/libpmc.c	Sat May  1 21:59:06 2010	(r207482)
@@ -737,9 +737,16 @@ iap_allocate_pmc(enum pmc_event pe, char
 	case PMC_EV_IAP_EVENT_40H: /* Core */
 	case PMC_EV_IAP_EVENT_41H: /* Core */
 	case PMC_EV_IAP_EVENT_42H: /* Core, Core2, Atom */
-	case PMC_EV_IAP_EVENT_77H: /* Core */
 		if (cachestate == 0)
 			cachestate = (0xF << 8);
+		break;
+	case PMC_EV_IAP_EVENT_77H: /* Atom */
+		/* IAP_EVENT_77H only accepts a cachestate qualifier on the
+		 * Atom processor
+		 */
+		if(cpu_info.pm_cputype == PMC_CPU_INTEL_ATOM && cachestate == 0)
+			cachestate = (0xF << 8);
+	    break;
 	default:
 		break;
 	}



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