Date: Sat, 28 Jul 2018 12:53:10 +0000 (UTC) From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r336831 - head/sys/arm/arm Message-ID: <201807281253.w6SCrA9C095438@repo.freebsd.org>
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Author: andrew Date: Sat Jul 28 12:53:10 2018 New Revision: 336831 URL: https://svnweb.freebsd.org/changeset/base/336831 Log: Remove some write only global values from the arm cpufunc code. Modified: head/sys/arm/arm/cpufunc.c Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Sat Jul 28 12:52:03 2018 (r336830) +++ head/sys/arm/arm/cpufunc.c Sat Jul 28 12:53:10 2018 (r336831) @@ -268,11 +268,6 @@ u_int cpu_reset_needs_v4_MMU_disable; /* flag used in defined(CPU_MV_PJ4B) || \ defined(CPU_CORTEXA) || defined(CPU_KRAIT) -/* Global cache line sizes, use 32 as default */ -int arm_dcache_min_line_size = 32; -int arm_icache_min_line_size = 32; -int arm_idcache_min_line_size = 32; - static void get_cachetype_cp15(void); /* Additional cache information local to this file. Log2 of some of the @@ -304,12 +299,6 @@ get_cachetype_cp15(void) goto out; if (CPU_CT_FORMAT(ctype) == CPU_CT_ARMV7) { - /* Resolve minimal cache line sizes */ - arm_dcache_min_line_size = 1 << (CPU_CT_DMINLINE(ctype) + 2); - arm_icache_min_line_size = 1 << (CPU_CT_IMINLINE(ctype) + 2); - arm_idcache_min_line_size = - min(arm_icache_min_line_size, arm_dcache_min_line_size); - __asm __volatile("mrc p15, 1, %0, c0, c0, 1" : "=r" (clevel)); arm_cache_level = clevel;
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