Date: Sun, 8 May 2005 07:44:13 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 76677 for review Message-ID: <200505080744.j487iDR9040128@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=76677 Change 76677 by marcel@marcel_nfs on 2005/05/08 07:43:16 Simplify the register I/O blocks. We have no need for compatibility with monochrome adapters, so can assume that the VGA adapter has the CRT controller registers at 0x3D0. We can always arrange for this to be the case. This means that we can treat the registers as being in a single I/O port range and thus that we have a single tag & handle for it. Affected files ... .. //depot/projects/tty/sys/dev/ic/vga.h#2 edit Differences ... ==== //depot/projects/tty/sys/dev/ic/vga.h#2 (text+ko) ==== @@ -30,92 +30,24 @@ #define _DEV_IC_VGA_H_ /* - * The VGA adapter uses two I/O port blocks. The first is either located - * at 0x3B0 or ar 0x3D0, depending on whether the adapter is in monochrome - * mode or not (resp). This block houses the CRT controller registers and - * CRTC register numbers are relative offsets to the base of this block. - * The second I/O port block is located at 0x3C0 and houses the other - * registers, of which the register numbers are offsets to the base of this - * I/O block. + * The VGA adapter uses two I/O port blocks. One of these blocks, the CRT + * controller registers can be located either at 0x3B0 or at 0x3D0 in I/O + * port space. This allows compatibility with the monochrome adapter, which + * as the CRT controller at 0x3B0. + * + * It is assumed that compatibility with the monochrome adapter is not of + * interest anymore. As such, the CRT controller is located at 0x3D0 in I/O + * port space. This means that the 2 I/O blocks are adjacent in I/O port + * space and can therefore be treated as a single logical I/O port block. + * This simplifies matters. */ #define VGA_MEM_BASE 0xA0000 #define VGA_MEM_SIZE 0x20000 -#define VGA_IO0_BASE 0x3c0 -#define VGA_IO0_SIZE 0x10 -#define VGA_IO1_COLOR 0x3d0 -#define VGA_IO1_MONO 0x3b0 -#define VGA_IO1_SIZE 0x0c +#define VGA_REG_BASE 0x3c0 +#define VGA_REG_SIZE 0x10+0x0c -/* CRT controller registers (base=CRTC {0x3B0, 0x3D0}). */ -#define VGA_CRTC_ADDRESS 0x04 -#define VGA_CRTC_HORIZ_TOTAL 0 -#define VGA_CRTC_HORIZ_DISP_END 1 -#define VGA_CRTC_START_HORIZ_BLANK 2 -#define VGA_CRTC_END_HORIZ_BLANK 3 -#define VGA_CRTC_EHB_CR 0x80 /* Compatible read */ -#define VGA_CRTC_EHB_DES 0x60 /* Display enable skew */ -#define VGA_CRTC_EHB_EHB 0x1F /* End horizontal blank */ -#define VGA_CRTC_START_HORIZ_RETRACE 4 -#define VGA_CRTC_END_HORIZ_RETRACE 5 -#define VGA_CRTC_EHR_EHB 0x80 /* End horizontal blanking */ -#define VGA_CRTC_EHR_HRD 0x60 /* Horizontal retrace delay */ -#define VGA_CRTC_EHR_EHR 0x1F /* End horizontal retrace */ -#define VGA_CRTC_VERT_TOTAL 6 -#define VGA_CRTC_OVERFLOW 7 -#define VGA_CRTC_OF_VRS9 0x80 /* Vertical retrace start */ -#define VGA_CRTC_OF_VDE9 0x40 /* Vertical disp. enable end */ -#define VGA_CRTC_OF_VT9 0x20 /* Vertical total (bit 9) */ -#define VGA_CRTC_OF_LC8 0x10 /* Line compare */ -#define VGA_CRTC_OF_VBS8 0x08 /* Start vertical blanking */ -#define VGA_CRTC_OF_VRS8 0x04 /* Vertical retrace start */ -#define VGA_CRTC_OF_VDE8 0x02 /* Vertical disp. enable end */ -#define VGA_CRTC_OF_VT8 0x01 /* Vertical total (bit 8) */ -#define VGA_CRTC_PRESET_ROW_SCAN 8 -#define VGA_CRTC_PRS_BP 0x60 /* Byte panning */ -#define VGA_CRTC_PRS_PRS 0x1F /* Preset row scan */ -#define VGA_CRTC_MAX_SCAN_LINE 9 -#define VGA_CRTC_MSL_2T4 0x80 /* 200-to-400 line conversion */ -#define VGA_CRTC_MSL_LC9 0x40 /* Line compare (bit 9) */ -#define VGA_CRTC_MSL_VBS9 0x20 /* Start vertical blanking */ -#define VGA_CRTC_MSL_MSL 0x1F /* Maximum scan line */ -#define VGA_CRTC_CURSOR_START 10 -#define VGA_CRTC_CS_COO 0x20 /* Cursor on/off */ -#define VGA_CRTC_CS_CS 0x1F /* Cursor start */ -#define VGA_CRTC_CURSOR_END 11 -#define VGA_CRTC_CE_CSK 0x60 /* Cursor skew */ -#define VGA_CRTC_CE_CE 0x1F /* Cursor end */ -#define VGA_CRTC_START_ADDR_HIGH 12 -#define VGA_CRTC_START_ADDR_LOW 13 -#define VGA_CRTC_CURSOR_LOC_HIGH 14 -#define VGA_CRTC_CURSOR_LOC_LOW 15 -#define VGA_CRTC_VERT_RETRACE_START 16 -#define VGA_CRTC_VERT_RETRACE_END 17 -#define VGA_CRTC_VRE_PR 0x80 /* Protect register 0-7 */ -#define VGA_CRTC_VRE_BW 0x40 /* Bandwidth */ -#define VGA_CRTC_VRE_VRE 0x1F /* Vertical retrace end */ -#define VGA_CRTC_VERT_DISPLAY_END 18 -#define VGA_CRTC_OFFSET 19 -#define VGA_CRTC_UNDERLINE_LOC 20 -#define VGA_CRTC_UL_DW 0x40 /* Double word mode */ -#define VGA_CRTC_UL_CB4 0x20 /* Count by four */ -#define VGA_CRTC_UL_UL 0x1F /* Underline location */ -#define VGA_CRTC_START_VERT_BLANK 21 -#define VGA_CRTC_END_VERT_BLANK 22 -#define VGA_CRTC_MODE_CONTROL 23 -#define VGA_CRTC_MC_HR 0x80 /* hardware reset */ -#define VGA_CRTC_MC_WB 0x40 /* Word/byte mode */ -#define VGA_CRTC_MC_AW 0x20 /* Address wrap */ -#define VGA_CRTC_MC_CBT 0x08 /* Count by two */ -#define VGA_CRTC_MC_HRS 0x04 /* Horizontal retrace select */ -#define VGA_CRTC_MC_SRS 0x02 /* Select row scan counter */ -#define VGA_CRTC_MC_CMS 0x01 /* Compatibility mode support */ -#define VGA_CRTC_LINE_COMPARE 24 -#define VGA_CRTC_DATA 0x05 -#define VGA_CRTC_FEATURE_CTRL 0x0a /* Write only. */ -#define VGA_CRTC_INPUT_STAT_1 0x0a /* Read only. */ - -/* Attribute controller registers (base=0x3C0). */ +/* Attribute controller registers. */ #define VGA_AC_WRITE 0x00 #define VGA_AC_READ 0x01 #define VGA_AC_PALETTE(x) x /* 0 <= x <= 15 */ @@ -140,8 +72,9 @@ #define VGA_AC_CS_C67 0x0C /* Color reg. addr. bits 6+7 */ #define VGA_AC_CS_C45 0x03 /* Color reg. addr. bits 4+5 */ -/* General registers (base=0x3c0). */ +/* General registers. */ #define VGA_GEN_MISC_OUTPUT_W 0x02 /* Write only. */ +#define VGA_GEN_MISC_OUTPUT_R 0x0c /* Read only. */ #define VGA_GEN_MO_VSP 0x80 /* Vertical sync. polarity */ #define VGA_GEN_MO_HSP 0x40 /* Horiz. sync. polarity */ #define VGA_GEN_MO_PB 0x20 /* Page bit for odd/even */ @@ -150,18 +83,14 @@ #define VGA_GEN_MO_IOA 0x01 /* Input/output address */ #define VGA_GEN_INPUT_STAT_0 0x02 /* Read only. */ #define VGA_GEN_IS0_SS 0x10 /* Switch sense */ -#define VGA_GEN_FEATURE_CTRL 0x0a /* Read only. */ +#define VGA_GEN_FEATURE_CTRL_W 0x1a /* Write only. */ +#define VGA_GEN_FEATURE_CTRL_R 0x0a /* Read only. */ #define VGA_GEN_FC_VSS 0x80 /* vertical sync. select */ -#define VGA_GEN_MISC_OUTPUT_R 0x0c /* Read only. */ +#define VGA_GEN_INPUT_STAT_1 0x1a /* Read only. */ +#define VGA_GEN_IS1_VR 0x08 /* Vertical retrace */ +#define VGA_GEN_IS1_DE 0x01 /* Display enable not */ -/* External registers (base=CRTC). */ -#define VGA_EXT_FEATURE_CTRL 0x0a /* Write only. */ -#define VGA_EXT_FC_VSS VGA_GEN_FC_VSS -#define VGA_EXT_INPUT_STAT_1 0x0a /* Read only. */ -#define VGA_EXT_IS1_VR 0x08 /* Vertical retrace */ -#define VGA_EXT_IS1_DE 0x01 /* Display enable not */ - -/* Sequencer registers (base=0x3c0). */ +/* Sequencer registers. */ #define VGA_SEQ_ADDRESS 0x04 #define VGA_SEQ_RESET 0 #define VGA_SEQ_RST_SR 0x02 /* Synchronous reset */ @@ -189,14 +118,14 @@ #define VGA_SEQ_MM_AG 0x01 /* Alpha/graphics mode */ #define VGA_SEQ_DATA 0x05 -/* Color registers (base=0x3c0). */ +/* Color registers. */ #define VGA_PEL_MASK 0x06 #define VGA_PEL_ADDR_RD_MODE 0x07 /* Write only. */ #define VGA_DAC_STATE 0x07 /* Read only. */ #define VGA_PEL_ADDR_WR_MODE 0x08 #define VGA_PEL_DATA 0x09 -/* Graphics controller registers (base=0x3C0). */ +/* Graphics controller registers. */ #define VGA_GC_ADDRESS 0x0e #define VGA_GC_SET_RESET 0 #define VGA_GC_ENABLE_SET_RESET 1 @@ -220,4 +149,70 @@ #define VGA_GC_BIT_MASK 8 #define VGA_GC_DATA 0x0f +/* CRT controller registers. */ +#define VGA_CRTC_ADDRESS 0x14 +#define VGA_CRTC_HORIZ_TOTAL 0 +#define VGA_CRTC_HORIZ_DISP_END 1 +#define VGA_CRTC_START_HORIZ_BLANK 2 +#define VGA_CRTC_END_HORIZ_BLANK 3 +#define VGA_CRTC_EHB_CR 0x80 /* Compatible read */ +#define VGA_CRTC_EHB_DES 0x60 /* Display enable skew */ +#define VGA_CRTC_EHB_EHB 0x1F /* End horizontal blank */ +#define VGA_CRTC_START_HORIZ_RETRACE 4 +#define VGA_CRTC_END_HORIZ_RETRACE 5 +#define VGA_CRTC_EHR_EHB 0x80 /* End horizontal blanking */ +#define VGA_CRTC_EHR_HRD 0x60 /* Horizontal retrace delay */ +#define VGA_CRTC_EHR_EHR 0x1F /* End horizontal retrace */ +#define VGA_CRTC_VERT_TOTAL 6 +#define VGA_CRTC_OVERFLOW 7 +#define VGA_CRTC_OF_VRS9 0x80 /* Vertical retrace start */ +#define VGA_CRTC_OF_VDE9 0x40 /* Vertical disp. enable end */ +#define VGA_CRTC_OF_VT9 0x20 /* Vertical total (bit 9) */ +#define VGA_CRTC_OF_LC8 0x10 /* Line compare */ +#define VGA_CRTC_OF_VBS8 0x08 /* Start vertical blanking */ +#define VGA_CRTC_OF_VRS8 0x04 /* Vertical retrace start */ +#define VGA_CRTC_OF_VDE8 0x02 /* Vertical disp. enable end */ +#define VGA_CRTC_OF_VT8 0x01 /* Vertical total (bit 8) */ +#define VGA_CRTC_PRESET_ROW_SCAN 8 +#define VGA_CRTC_PRS_BP 0x60 /* Byte panning */ +#define VGA_CRTC_PRS_PRS 0x1F /* Preset row scan */ +#define VGA_CRTC_MAX_SCAN_LINE 9 +#define VGA_CRTC_MSL_2T4 0x80 /* 200-to-400 line conversion */ +#define VGA_CRTC_MSL_LC9 0x40 /* Line compare (bit 9) */ +#define VGA_CRTC_MSL_VBS9 0x20 /* Start vertical blanking */ +#define VGA_CRTC_MSL_MSL 0x1F /* Maximum scan line */ +#define VGA_CRTC_CURSOR_START 10 +#define VGA_CRTC_CS_COO 0x20 /* Cursor on/off */ +#define VGA_CRTC_CS_CS 0x1F /* Cursor start */ +#define VGA_CRTC_CURSOR_END 11 +#define VGA_CRTC_CE_CSK 0x60 /* Cursor skew */ +#define VGA_CRTC_CE_CE 0x1F /* Cursor end */ +#define VGA_CRTC_START_ADDR_HIGH 12 +#define VGA_CRTC_START_ADDR_LOW 13 +#define VGA_CRTC_CURSOR_LOC_HIGH 14 +#define VGA_CRTC_CURSOR_LOC_LOW 15 +#define VGA_CRTC_VERT_RETRACE_START 16 +#define VGA_CRTC_VERT_RETRACE_END 17 +#define VGA_CRTC_VRE_PR 0x80 /* Protect register 0-7 */ +#define VGA_CRTC_VRE_BW 0x40 /* Bandwidth */ +#define VGA_CRTC_VRE_VRE 0x1F /* Vertical retrace end */ +#define VGA_CRTC_VERT_DISPLAY_END 18 +#define VGA_CRTC_OFFSET 19 +#define VGA_CRTC_UNDERLINE_LOC 20 +#define VGA_CRTC_UL_DW 0x40 /* Double word mode */ +#define VGA_CRTC_UL_CB4 0x20 /* Count by four */ +#define VGA_CRTC_UL_UL 0x1F /* Underline location */ +#define VGA_CRTC_START_VERT_BLANK 21 +#define VGA_CRTC_END_VERT_BLANK 22 +#define VGA_CRTC_MODE_CONTROL 23 +#define VGA_CRTC_MC_HR 0x80 /* hardware reset */ +#define VGA_CRTC_MC_WB 0x40 /* Word/byte mode */ +#define VGA_CRTC_MC_AW 0x20 /* Address wrap */ +#define VGA_CRTC_MC_CBT 0x08 /* Count by two */ +#define VGA_CRTC_MC_HRS 0x04 /* Horizontal retrace select */ +#define VGA_CRTC_MC_SRS 0x02 /* Select row scan counter */ +#define VGA_CRTC_MC_CMS 0x01 /* Compatibility mode support */ +#define VGA_CRTC_LINE_COMPARE 24 +#define VGA_CRTC_DATA 0x15 + #endif /* !_DEV_IC_VGA_H_ */
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