Date: Sat, 2 Sep 2006 16:11:57 GMT From: Oleksandr Tymoshenko <gonzo@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 105542 for review Message-ID: <200609021611.k82GBvJv032624@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=105542 Change 105542 by gonzo@gonzo_hideout on 2006/09/02 16:11:54 o Change defines of register numbers to proper ones. Affected files ... .. //depot/projects/mips2/src/lib/libstand/mips/_setjmp.S#2 edit Differences ... ==== //depot/projects/mips2/src/lib/libstand/mips/_setjmp.S#2 (text+ko) ==== @@ -34,7 +34,6 @@ #include <machine/regnum.h> #include <machine/asm.h> -#include <machine/setjmp.h> #if defined(LIBC_SCCS) && !defined(lint) ASMSTR("from: @(#)_setjmp.s 8.1 (Berkeley) 6/4/93") @@ -69,16 +68,16 @@ REG_LI v0, 0xACEDBADE # sigcontext magic number REG_S ra, (2 * 4)(a0) # sc_pc = return address REG_S v0, (_OFFSETOF_SC_REGS)(a0) # saved in sc_regs[0] - REG_S s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_S s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_S s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) cfc1 v0, $31 # too bad cant check if FP used swc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) swc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0) @@ -113,17 +112,17 @@ REG_LI t0, 0xACEDBADE bne v0, t0, botch # jump if error addu sp, sp, 32 # does not matter, sanity - REG_L s0, (_R_S0 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s1, (_R_S1 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s2, (_R_S2 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s3, (_R_S3 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s4, (_R_S4 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s5, (_R_S5 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s6, (_R_S6 * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s7, (_R_S7 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s0, (S0 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s1, (S1 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s2, (S2 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s3, (S3 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s4, (S4 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s5, (S5 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s6, (S6 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s7, (S7 * SZREG + _OFFSETOF_SC_REGS)(a0) lw v0, (32 * 4 + _OFFSETOF_SC_FPREGS)(a0) # get fpu status - REG_L sp, (_R_SP * SZREG + _OFFSETOF_SC_REGS)(a0) - REG_L s8, (_R_S8 * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L sp, (SP * SZREG + _OFFSETOF_SC_REGS)(a0) + REG_L s8, (S8 * SZREG + _OFFSETOF_SC_REGS)(a0) ctc1 v0, $31 lwc1 $f20, (20 * 4 + _OFFSETOF_SC_FPREGS)(a0) lwc1 $f21, (21 * 4 + _OFFSETOF_SC_FPREGS)(a0)
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