Date: Sat, 3 Aug 2019 01:55:51 +0000 (UTC) From: Justin Hibbits <jhibbits@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r350552 - head/sys/powerpc/powernv Message-ID: <201908030155.x731tpSt008029@repo.freebsd.org>
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Author: jhibbits Date: Sat Aug 3 01:55:51 2019 New Revision: 350552 URL: https://svnweb.freebsd.org/changeset/base/350552 Log: powerpc/powernv: Fix OPAL cfgread/cfgwrite error handling Freeze clearing needs to heppen any time OPAL reads return either an error (except OPAL_HARDWARE), AND any time it returns 0xff for all bytes. For cfgwrite, any error that's not OPAL_HARDWARE should be cleaned up. Modified: head/sys/powerpc/powernv/opal_pci.c Modified: head/sys/powerpc/powernv/opal_pci.c ============================================================================== --- head/sys/powerpc/powernv/opal_pci.c Sat Aug 3 01:36:05 2019 (r350551) +++ head/sys/powerpc/powernv/opal_pci.c Sat Aug 3 01:55:51 2019 (r350552) @@ -531,16 +531,16 @@ opalpci_read_config(device_t dev, u_int bus, u_int slo default: error = OPAL_SUCCESS; word = 0xffffffff; + width = 4; } /* * Poking config state for non-existant devices can make * the host bridge hang up. Clear any errors. - * - * XXX: Make this conditional on the existence of a freeze */ - if (error != OPAL_SUCCESS) { + if (error != OPAL_SUCCESS || + (word == ((1UL << (8 * width)) - 1))) { if (error != OPAL_HARDWARE) { opal_call(OPAL_PCI_EEH_FREEZE_STATUS, sc->phb_id, OPAL_PCI_DEFAULT_PE, vtophys(&eeh_state), @@ -550,7 +550,8 @@ opalpci_read_config(device_t dev, u_int bus, u_int slo sc->phb_id, OPAL_PCI_DEFAULT_PE, OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); } - word = 0xffffffff; + if (error != OPAL_SUCCESS) + word = 0xffffffff; } return (word); @@ -563,8 +564,6 @@ opalpci_write_config(device_t dev, u_int bus, u_int sl struct opalpci_softc *sc; uint64_t config_addr; int error = OPAL_SUCCESS; - uint16_t err_type; - uint8_t eeh_state; sc = device_get_softc(dev); @@ -591,13 +590,9 @@ opalpci_write_config(device_t dev, u_int bus, u_int sl * the host bridge hang up. Clear any errors. */ if (error != OPAL_HARDWARE) { - opal_call(OPAL_PCI_EEH_FREEZE_STATUS, sc->phb_id, - OPAL_PCI_DEFAULT_PE, vtophys(&eeh_state), - vtophys(&err_type), NULL); - if (eeh_state != OPAL_EEH_STOPPED_NOT_FROZEN) - opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, - sc->phb_id, OPAL_PCI_DEFAULT_PE, - OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); + opal_call(OPAL_PCI_EEH_FREEZE_CLEAR, + sc->phb_id, OPAL_PCI_DEFAULT_PE, + OPAL_EEH_ACTION_CLEAR_FREEZE_ALL); } } }
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