Date: Wed, 12 Aug 2015 09:46:40 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r286658 - in head/sys: amd64/amd64 i386/i386 Message-ID: <201508120946.t7C9keUi052121@repo.freebsd.org>
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Author: kib Date: Wed Aug 12 09:46:39 2015 New Revision: 286658 URL: https://svnweb.freebsd.org/changeset/base/286658 Log: Initialization of smp_tlb_wait does not require release semantic, no data is synchronized by store/load to the variable. The lapic_write_icr() function ensures that store buffers are flushed before IPI command is issued. Discussed with: bde Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 2 weeks Modified: head/sys/amd64/amd64/mp_machdep.c head/sys/i386/i386/mp_machdep.c Modified: head/sys/amd64/amd64/mp_machdep.c ============================================================================== --- head/sys/amd64/amd64/mp_machdep.c Wed Aug 12 09:43:12 2015 (r286657) +++ head/sys/amd64/amd64/mp_machdep.c Wed Aug 12 09:46:39 2015 (r286658) @@ -440,7 +440,7 @@ smp_targeted_tlb_shootdown(cpuset_t mask smp_tlb_addr1 = addr1; smp_tlb_addr2 = addr2; smp_tlb_pmap = pmap; - atomic_store_rel_int(&smp_tlb_wait, 0); + smp_tlb_wait = 0; if (CPU_ISFULLSET(&mask)) { ncpu = othercpus; ipi_all_but_self(vector); Modified: head/sys/i386/i386/mp_machdep.c ============================================================================== --- head/sys/i386/i386/mp_machdep.c Wed Aug 12 09:43:12 2015 (r286657) +++ head/sys/i386/i386/mp_machdep.c Wed Aug 12 09:46:39 2015 (r286658) @@ -504,7 +504,7 @@ smp_tlb_shootdown(u_int vector, vm_offse mtx_lock_spin(&smp_ipi_mtx); smp_tlb_addr1 = addr1; smp_tlb_addr2 = addr2; - atomic_store_rel_int(&smp_tlb_wait, 0); + smp_tlb_wait = 0; ipi_all_but_self(vector); while (smp_tlb_wait < ncpu) ia32_pause();
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