Date: Thu, 06 Aug 2026 18:03:24 +0000 From: Jessica Clarke <jrtc27@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 6184b31972ff - stable/15 - arm64/vmm: Fix vgic_v3 dropping EOI for disabled IRQs Message-ID: <6a74cc6c.30c6a.1ba583c0@gitrepo.freebsd.org>
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The branch stable/15 has been updated by jrtc27: URL: https://cgit.FreeBSD.org/src/commit/?id=6184b31972ff8cb3e93d5618c73744f0687efcc4 commit 6184b31972ff8cb3e93d5618c73744f0687efcc4 Author: Jessica Clarke <jrtc27@FreeBSD.org> AuthorDate: 2026-07-17 23:57:15 +0000 Commit: Jessica Clarke <jrtc27@FreeBSD.org> CommitDate: 2026-08-06 18:02:04 +0000 arm64/vmm: Fix vgic_v3 dropping EOI for disabled IRQs Now that IRQs can properly be disabled by GICD_ICENABLERn, an EOI for a disabled IRQ ends up being lost, since we don't assign it to a list register and don't enable maintenance interrupts for such cases. As a result, we keep the IRQ active, which stops it from ever being delivered again (which would be true even if we supported the active and pending state). Keep disabled but active IRQs around in list registers so we can see the EOI having taken place in a future sync (noting that since we already don't create list registers in active and pending state there are no concerns with causing a disabled IRQ to be delivered). Fixes: 47e073941f4e ("Import the kernel parts of bhyve/arm64") MFC after: 1 week (cherry picked from commit 123dfd378959aecc97cfc1d9b457453194d6f25b) --- sys/arm64/vmm/io/vgic_v3.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sys/arm64/vmm/io/vgic_v3.c b/sys/arm64/vmm/io/vgic_v3.c index 1565dfb33bc9..ac3720c4c443 100644 --- a/sys/arm64/vmm/io/vgic_v3.c +++ b/sys/arm64/vmm/io/vgic_v3.c @@ -2135,7 +2135,13 @@ vgic_v3_flush_hwstate(device_t dev, struct hypctx *hypctx) if (i == hypctx->vgic_v3_regs.ich_lr_num) break; - if (!irq->enabled) + /* + * NB: Disabled active interrupts are kept around for EOI to + * make them inactive, since we don't enable maintenace + * interrupts to intercept EOIs for interrupts not in a list + * register. + */ + if (!irq->enabled && !irq->active) continue; hypctx->vgic_v3_regs.ich_lr_el2[i] = ICH_LR_EL2_GROUP1 |home | help
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