Date: Sun, 30 Jun 2019 19:47:15 +0000 (UTC) From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r349563 - head/contrib/elftoolchain/readelf Message-ID: <201906301947.x5UJlFYD093027@repo.freebsd.org>
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Author: mhorne Date: Sun Jun 30 19:47:15 2019 New Revision: 349563 URL: https://svnweb.freebsd.org/changeset/base/349563 Log: readelf: Add RISC-V DWARF register aliases This allows DWARF debugging output to use the common register mneumonics, such as ra, sp, or t0. DWARF registers 0-31 are mapped to the 32 general purpose registers, which are then followed by the 32 floating point registers. Reviewed by: markj Approved by: markj (mentor) MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D20779 Modified: head/contrib/elftoolchain/readelf/readelf.c Modified: head/contrib/elftoolchain/readelf/readelf.c ============================================================================== --- head/contrib/elftoolchain/readelf/readelf.c Sun Jun 30 19:43:13 2019 (r349562) +++ head/contrib/elftoolchain/readelf/readelf.c Sun Jun 30 19:47:15 2019 (r349563) @@ -2080,6 +2080,74 @@ dwarf_reg(unsigned int mach, unsigned int reg) case 49: return "ldtr"; default: return (NULL); } + case EM_RISCV: + switch (reg) { + case 0: return "zero"; + case 1: return "ra"; + case 2: return "sp"; + case 3: return "gp"; + case 4: return "tp"; + case 5: return "t0"; + case 6: return "t1"; + case 7: return "t2"; + case 8: return "s0"; + case 9: return "s1"; + case 10: return "a0"; + case 11: return "a1"; + case 12: return "a2"; + case 13: return "a3"; + case 14: return "a4"; + case 15: return "a5"; + case 16: return "a6"; + case 17: return "a7"; + case 18: return "s2"; + case 19: return "s3"; + case 20: return "s4"; + case 21: return "s5"; + case 22: return "s6"; + case 23: return "s7"; + case 24: return "s8"; + case 25: return "s9"; + case 26: return "s10"; + case 27: return "s11"; + case 28: return "t3"; + case 29: return "t4"; + case 30: return "t5"; + case 31: return "t6"; + case 32: return "ft0"; + case 33: return "ft1"; + case 34: return "ft2"; + case 35: return "ft3"; + case 36: return "ft4"; + case 37: return "ft5"; + case 38: return "ft6"; + case 39: return "ft7"; + case 40: return "fs0"; + case 41: return "fs1"; + case 42: return "fa0"; + case 43: return "fa1"; + case 44: return "fa2"; + case 45: return "fa3"; + case 46: return "fa4"; + case 47: return "fa5"; + case 48: return "fa6"; + case 49: return "fa7"; + case 50: return "fs2"; + case 51: return "fs3"; + case 52: return "fs4"; + case 53: return "fs5"; + case 54: return "fs6"; + case 55: return "fs7"; + case 56: return "fs8"; + case 57: return "fs9"; + case 58: return "fs10"; + case 59: return "fs11"; + case 60: return "ft8"; + case 61: return "ft9"; + case 62: return "ft10"; + case 63: return "ft11"; + default: return (NULL); + } case EM_X86_64: switch (reg) { case 0: return "rax";
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