Date: Mon, 26 Feb 1996 13:55:57 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: imb@scgt.oz.au (michael butler) Cc: current@FreeBSD.ORG Subject: Re: Opti 82C895 cache coherency ? Message-ID: <199602262055.NAA02567@phaeton.artisoft.com> In-Reply-To: <199602260929.UAA05214@asstdc.scgt.oz.au> from "michael butler" at Feb 26, 96 08:29:06 pm
next in thread | previous in thread | raw e-mail | index | archive | help
> I wonder if anyone can vouch for an Opti 82C895/82C602 motherboard with an > AMD 486DX4/100 in respect of cache coherency. Specifically, in combination > with an Adaptec 2842 (VLB) controller. Just trying to track down a "quirk" > with a (sort of working) -stable .. I don't know if it's -stable or the > motherboard :-( Does it work with cache disabled? If so, I suspect the VLB slot the controller is in is not a master slot. If you plan to use a VLB controller that does bus master DMA, make sure the controller is in a master slot. Identifying a master slot may require talking to 5 or 6 people at the motherboard manufacturer, and even then you might never find out the right slot. THe rule of thumb has been "the slot closest to the edge of the motherboard", for what it's worth. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199602262055.NAA02567>