Date: Thu, 5 Aug 2004 19:30:55 -0700 From: Bruce M Simpson <bms@spc.org> To: John Baldwin <jhb@freebsd.org> Cc: Tim Robbins <tjr@freebsd.org> Subject: Re: Atomic operations on i386/amd64 Message-ID: <20040806023055.GC20148@empiric.icir.org> In-Reply-To: <4112B184.8010303@samsco.org> References: <20040805050422.GA41201@cat.robbins.dropbear.id.au> <200408051759.53079.jhb@FreeBSD.org> <4112B184.8010303@samsco.org>
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On Thu, Aug 05, 2004 at 04:15:32PM -0600, Scott Long wrote: > >>Is there any particular reason why atomic_load_acq_*() and > >>atomic_store_rel_*() are implemented with CMPXCHG and XCHG instead of > >>MOV on i386/amd64 UP? Have a look at Linux. They ended up doing a runtime self-modifying kernel hack so they could ship generic kernels which used the appropriate locking instructions on each x86 family CPU. BMShelp
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