Date: Thu, 25 Jun 2026 00:28:02 +0000 From: Olivier Certner <olce@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 39975c7778fd - main - hwpstate_intel(4): sysctl_epp_select(): Cache again new EPP value Message-ID: <6a3c7612.3b53e.2d8439d3@gitrepo.freebsd.org>
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The branch main has been updated by olce: URL: https://cgit.FreeBSD.org/src/commit/?id=39975c7778fd6ac56571ec64a2003b06a1ca8a52 commit 39975c7778fd6ac56571ec64a2003b06a1ca8a52 Author: Olivier Certner <olce@FreeBSD.org> AuthorDate: 2026-06-25 00:17:58 +0000 Commit: Olivier Certner <olce@FreeBSD.org> CommitDate: 2026-06-25 00:27:30 +0000 hwpstate_intel(4): sysctl_epp_select(): Cache again new EPP value This caching was removed inadvertently in the commit mentioned below. Fixes: 8452afeb5682 ("hwpstate_intel: Use 8bit scale instead of percentage scale") Event: Halifax Hackathon 202606 Location: jrm@'s living room Sponsored by: The FreeBSD Foundation --- sys/x86/cpufreq/hwpstate_intel.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sys/x86/cpufreq/hwpstate_intel.c b/sys/x86/cpufreq/hwpstate_intel.c index 81edff278de8..352e44f84c4e 100644 --- a/sys/x86/cpufreq/hwpstate_intel.c +++ b/sys/x86/cpufreq/hwpstate_intel.c @@ -314,16 +314,16 @@ sysctl_epp_select(SYSCTL_HANDLER_ARGS) } if (sc->hwp_pref_ctrl) { - sc->req = - ((sc->req & ~IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) - | (val << 24u)); + const uint64_t req_cached = sc->req = (sc->req & + ~IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) | + (val << 24u); if (sc->hwp_pkg_ctrl_en) ret = WRMSR_ON_CPU(dev, MSR_IA32_HWP_REQUEST_PKG, - sc->req); + req_cached); else ret = WRMSR_ON_CPU(dev, MSR_IA32_HWP_REQUEST, - sc->req); + req_cached); } else { val = EPP_TO_EPB(val); MPASS((val & ~IA32_ENERGY_PERF_BIAS_POLICY_HINT_MASK) == 0);home | help
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