Date: Mon, 13 Nov 2000 20:44:15 +1100 (EST) From: Bruce Evans <bde@zeta.org.au> To: Marcel Moolenaar <marcel@cup.hp.com> Cc: Makoto MATSUSHITA <matusita@jp.FreeBSD.org>, current@FreeBSD.ORG, stable@FreeBSD.ORG Subject: Re: "make modules" kicks the first module directory twice Message-ID: <Pine.BSF.4.21.0011131953001.646-100000@besplex.bde.org> In-Reply-To: <3A0F9ED8.A56CA34E@cup.hp.com>
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On Sun, 12 Nov 2000, Marcel Moolenaar wrote:
> Makoto MATSUSHITA wrote:
> >
> > % make -j 2 modules
> > cd ../../modules && env MAKEOBJDIRPREFIX=/usr/src/sys/compile/GENERIC/modules KMODDIR=/boot/kernel make obj all
> > ===> 3dfx
> > ===> 3dfx
> > Warning: Object directory not changed from original /usr/src/sys/modules/3dfx
> > (... ok, break it ...)
>
> The problem is in the fact that the Makefile (the one in /sys/conf)
> contains something like:
>
> ${MAKE} obj all
>
> and
>
> ${MAKE} obj depend
>
> The net effect is that these targets are built in parallel, which
> obviously isn't right. The following solves the problem (i386 only):
That's just one of the problems :-). "make obj all" is usually an
error, but in Makefile.${MACHINE} it should be just a bad example,
since the `obj' and `all' targets should be built sequentially and then
the object directories will exist by the time make(1) recurses into
them for the `all' target. This doesn't work right for the -j case.
(In the above example, the targets are built concurrently and race
each other. This is bad when the `all' target wins the race. The
`obj' target runs faster, so it usually wins the race except in the
first directory (3dfx)). More .ORDER statements in *.mk are required.
> Index: Makefile.i386
> ===================================================================
> RCS file: /home/ncvs/src/sys/conf/Makefile.i386,v
> retrieving revision 1.212
> diff -u -r1.212 Makefile.i386
> --- Makefile.i386 2000/10/29 09:47:50 1.212
> +++ Makefile.i386 2000/11/13 07:49:00
> @@ -271,11 +271,13 @@
>
> modules:
> @mkdir -p ${.OBJDIR}/modules
> - cd $S/modules && env ${MKMODULESENV} ${MAKE} obj all
> + cd $S/modules && env ${MKMODULESENV} ${MAKE} obj && \
> + env ${MKMODULESENV} ${MAKE} all
>
> modules-depend:
> @mkdir -p ${.OBJDIR}/modules
> - cd $S/modules && env ${MKMODULESENV} ${MAKE} obj depend
> + cd $S/modules && env ${MKMODULESENV} ${MAKE} obj $$ \
> + env ${MKMODULESENV} ${MAKE} depend
>
> modules-clean:
> cd $S/modules && env ${MKMODULESENV} ${MAKE} clean
>
`&&' should never be used in shell commands in makefiles, although it
may be only a bad example. This is because multiple commands are
executed in the same shell in the -j case, and `&&' gives non-simple
commands which may defeat the shell's -e setting. E.g., the command:
cd /; set -e; cd /nonesuch && false; rm -rf *
removes everything under "/", not everything under /nonesuch, despite
checking that the cd to /nonesuch worked.
Bruce
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