Date: Sat, 27 Sep 2008 13:15:37 +0200 From: "Marco Trillo" <marcotrillo@gmail.com> To: "Nathan Whitehorn" <nwhitehorn@freebsd.org> Cc: freebsd-ppc@freebsd.org Subject: Re: Onboard audio support and DBDMA API extensions. Message-ID: <b9c23c9f0809270415u5672ecdx9de96b30fce1dfa4@mail.gmail.com> In-Reply-To: <48DD2D9B.2070706@freebsd.org> References: <b9c23c9f0809261117h3df592f6n43738a151bd233e3@mail.gmail.com> <48DD2D9B.2070706@freebsd.org>
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Hi,
On Fri, Sep 26, 2008 at 8:44 PM, Nathan Whitehorn
<nwhitehorn@freebsd.org> wrote:
> Marco Trillo wrote:
>> I also have preliminary support for the GPIO controls, which are used
>> mainly to select the output port (built-in speakers or headphones).
>> What I have yet to do is to support the mixer(4) interface (to support
>> changing the output volume), which needs support for the Keywest I2C
>> controller in order to talk to the codec. I have in fact ported a
>> Keywest I2C driver from NetBSD, but I don't use it much yet.
>
> I think we need to come up with a good way to handle the GPIO stuff and FCR
> setting. GPIO is also needed for PMU support (my current PMU driver has ugly
> hacks) and for SMU on G5 machines.
I agree; I'm also using a ugly hack for accessing the GPIO space in
the aoa driver (using hardcoded base address and relying on BAT
mapping).
> Maybe some new interfaces to macio?
This is probably the best way; macio.c would map the FCR and GPIO
spaces and provide accessor functions for clearing, setting and
testing bits in the FCRs and writing and reading from GPIO lines.
The aoa driver would also need to access the FCR1 in order to stop and
reenable the I2S clock, in order to support changing the sampling
rate, but this part is ifdefed-out by now (currently I have it fixed
at 44100Hz).
> > I would like to propose the following additions to the DBDMA API,
>>
>> which I'm using in the driver:
>>
>> void dbdma_clear_cmd_status(dbdma_channel_t *, int slot);
>> Clears the cmdStatus of DBDMA command at slot 'slot'. Used for keeping
>> track of completed blocks.
>>
>> void dbdma_control(dbdma_channel_t *, uint8_t mask, uint8_t in);
>> General-purpose manipulation of the DBDMA channel control register.
>> Used for setting/clearing general-purpose control bits such as S0.
>
> Looks good to me. I'd suggest changing the name of dbdma_control() to
> dbdma_set_chan_status() to match dbdma_get_chan_status(), though.
>
OK. Here is patch which adds the functions dbdma_clear_cmd_status()
and dbdma_set_chan_status():
Index: include/dbdma.h
===================================================================
RCS file: /home/ncvs/src/sys/powerpc/include/dbdma.h,v
retrieving revision 1.2
diff -u -r1.2 dbdma.h
--- include/dbdma.h 23 Sep 2008 02:12:47 -0000 1.2
+++ include/dbdma.h 27 Sep 2008 11:12:25 -0000
@@ -85,6 +85,7 @@
int dbdma_free_channel(dbdma_channel_t *chan);
uint16_t dbdma_get_cmd_status(dbdma_channel_t *chan, int slot);
+void dbdma_clear_cmd_status(dbdma_channel_t *, int);
uint16_t dbdma_get_residuals(dbdma_channel_t *chan, int slot);
void dbdma_run(dbdma_channel_t *chan);
@@ -104,6 +105,7 @@
uint8_t value);
void dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask,
uint8_t value);
+void dbdma_set_chan_status(dbdma_channel_t *, uint8_t, uint8_t);
void dbdma_insert_command(dbdma_channel_t *chan, int slot, int command,
int stream, bus_addr_t data, size_t count, uint8_t interrupt,
cvs diff: Diffing mpc85xx
cvs diff: Diffing ofw
cvs diff: Diffing powermac
Index: powermac/dbdma.c
===================================================================
RCS file: /home/ncvs/src/sys/powerpc/powermac/dbdma.c,v
retrieving revision 1.2
diff -u -r1.2 dbdma.c
--- powermac/dbdma.c 23 Sep 2008 02:12:47 -0000 1.2
+++ powermac/dbdma.c 27 Sep 2008 11:12:26 -0000
@@ -127,6 +127,12 @@
return (le16toh(chan->sc_slots[slot].resCount));
}
+void
+dbdma_clear_cmd_status(dbdma_channel_t *chan, int slot)
+{
+ chan->sc_slots[slot].resCount = 0;
+}
+
uint16_t
dbdma_get_residuals(dbdma_channel_t *chan, int slot)
{
@@ -241,6 +247,17 @@
}
void
+dbdma_set_chan_status(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
+{
+ uint32_t x;
+
+ x = mask;
+ x <<= 16;
+ x |= val;
+ dbdma_write_reg(chan, CHAN_CONTROL_REG, x);
+}
+
+void
dbdma_set_wait_selector(dbdma_channel_t *chan, uint8_t mask, uint8_t val)
{
uint32_t wait_select;
Thanks,
Marco.
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