Date: Wed, 31 May 2006 15:50:33 +0000 (UTC) From: Olivier Houchard <cognet@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/arm/arm busdma_machdep.c Message-ID: <200605311550.k4VFoXWr005766@repoman.freebsd.org>
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cognet 2006-05-31 15:50:33 UTC
FreeBSD src repository
Modified files:
sys/arm/arm busdma_machdep.c
Log:
If our buffer is not aligned on the cache line size, write back/invalidate
the first and last cache line in PREREAD, and just invalidate the cache
lines in POSTREAD, instead of write-back/invalidating in POSTREAD, which
could lead to stale data overriding what has been transfered by DMA.
Revision Changes Path
1.26 +10 -7 src/sys/arm/arm/busdma_machdep.c
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