Date: Fri, 7 Aug 2020 17:32:54 +0000 (UTC) From: Alexander Motin <mav@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r364033 - in stable/12/sys/dev: acpica pci Message-ID: <202008071732.077HWsRr081452@repo.freebsd.org>
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Author: mav Date: Fri Aug 7 17:32:53 2020 New Revision: 364033 URL: https://svnweb.freebsd.org/changeset/base/364033 Log: MFC r362661: Add mostly dummy hw.pci.enable_aspm tunable. The only thing this tunable enables now is reporting to ACPI _OSC that Active State Power Management and Clock Power Management Capability are "supported" by the OS. I've found that at least some Supermicro server boards do not allow OS to support native PCIe hot-plug unless it reports those capabilities. After spending significant time in PCIe specs I have found very little motivation for that, and none of it applies to those motherboards, not enabling ASPM themselves. So unless OS explicitly wants to save power, I see nothing for it to do there actually. I guess it may get sense to support ASPM when we get Thunderbolt support. Otherwise I have no system with PCIe hot-plug where power saving matters. It would be nice to enable this by default, but I worry that it affect power saving of some laptops, even though I haven't noticed that myself. Modified: stable/12/sys/dev/acpica/acpi_pcib_acpi.c stable/12/sys/dev/pci/pci.c stable/12/sys/dev/pci/pcivar.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/acpica/acpi_pcib_acpi.c ============================================================================== --- stable/12/sys/dev/acpica/acpi_pcib_acpi.c Fri Aug 7 17:25:56 2020 (r364032) +++ stable/12/sys/dev/acpica/acpi_pcib_acpi.c Fri Aug 7 17:32:53 2020 (r364033) @@ -326,6 +326,10 @@ acpi_pcib_osc(struct acpi_hpcib_softc *sc, uint32_t os /* Support Field: Extended PCI Config Space, PCI Segment Groups, MSI */ cap_set[PCI_OSC_SUPPORT] = PCIM_OSC_SUPPORT_EXT_PCI_CONF | PCIM_OSC_SUPPORT_SEG_GROUP | PCIM_OSC_SUPPORT_MSI; + /* Active State Power Management, Clock Power Management Capability */ + if (pci_enable_aspm) + cap_set[PCI_OSC_SUPPORT] |= PCIM_OSC_SUPPORT_ASPM | + PCIM_OSC_SUPPORT_CPMC; /* Control Field */ cap_set[PCI_OSC_CTL] = sc->ap_osc_ctl | osc_ctl; Modified: stable/12/sys/dev/pci/pci.c ============================================================================== --- stable/12/sys/dev/pci/pci.c Fri Aug 7 17:25:56 2020 (r364032) +++ stable/12/sys/dev/pci/pci.c Fri Aug 7 17:32:53 2020 (r364033) @@ -411,6 +411,10 @@ static int pci_enable_ari = 1; SYSCTL_INT(_hw_pci, OID_AUTO, enable_ari, CTLFLAG_RDTUN, &pci_enable_ari, 0, "Enable support for PCIe Alternative RID Interpretation"); +int pci_enable_aspm; +SYSCTL_INT(_hw_pci, OID_AUTO, enable_aspm, CTLFLAG_RDTUN, &pci_enable_aspm, + 0, "Enable support for PCIe Active State Power Management"); + static int pci_clear_aer_on_attach = 0; SYSCTL_INT(_hw_pci, OID_AUTO, clear_aer_on_attach, CTLFLAG_RWTUN, &pci_clear_aer_on_attach, 0, Modified: stable/12/sys/dev/pci/pcivar.h ============================================================================== --- stable/12/sys/dev/pci/pcivar.h Fri Aug 7 17:25:56 2020 (r364032) +++ stable/12/sys/dev/pci/pcivar.h Fri Aug 7 17:32:53 2020 (r364033) @@ -258,6 +258,7 @@ typedef struct { } pcih2cfgregs; extern uint32_t pci_numdevs; +extern int pci_enable_aspm; struct pci_device_table { #if BYTE_ORDER == LITTLE_ENDIAN
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