Date: Thu, 15 Jan 2015 22:31:36 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r277222 - in vendor/clang/dist: docs include/clang/Basic lib/CodeGen lib/Sema test test/CodeGen test/CodeGenCXX test/Driver test/Misc test/Sema test/SemaCXX test/SemaTemplate Message-ID: <201501152231.t0FMVaRw039071@svn.freebsd.org>
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Author: dim Date: Thu Jan 15 22:31:35 2015 New Revision: 277222 URL: https://svnweb.freebsd.org/changeset/base/277222 Log: Vendor import of clang RELEASE_351/final tag r225668 (effectively, 3.5.1 release): https://llvm.org/svn/llvm-project/cfe/tags/RELEASE_351/final@225668 Added: vendor/clang/dist/test/CodeGen/mips-varargs.c (contents, props changed) vendor/clang/dist/test/CodeGen/mips-zero-sized-struct.c (contents, props changed) Modified: vendor/clang/dist/docs/ReleaseNotes.rst vendor/clang/dist/include/clang/Basic/DiagnosticSemaKinds.td vendor/clang/dist/lib/CodeGen/CGExprScalar.cpp vendor/clang/dist/lib/CodeGen/TargetInfo.cpp vendor/clang/dist/lib/Sema/SemaDecl.cpp vendor/clang/dist/lib/Sema/SemaTemplate.cpp vendor/clang/dist/test/CodeGen/atomics-inlining.c vendor/clang/dist/test/CodeGen/mips-byval-arg.c vendor/clang/dist/test/CodeGen/mips-vector-arg.c vendor/clang/dist/test/CodeGen/mips-vector-return.c vendor/clang/dist/test/CodeGen/mips64-class-return.cpp vendor/clang/dist/test/CodeGen/mips64-padding-arg.c vendor/clang/dist/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp vendor/clang/dist/test/Driver/cl-x86-flags.c vendor/clang/dist/test/Driver/mips-cs.cpp vendor/clang/dist/test/Driver/mips-fsf.cpp vendor/clang/dist/test/Makefile vendor/clang/dist/test/Misc/backend-optimization-failure.cpp vendor/clang/dist/test/Sema/dllexport.c vendor/clang/dist/test/Sema/dllimport.c vendor/clang/dist/test/Sema/types.c vendor/clang/dist/test/SemaCXX/dllexport.cpp vendor/clang/dist/test/SemaCXX/dllimport.cpp vendor/clang/dist/test/SemaTemplate/deduction.cpp vendor/clang/dist/test/lit.cfg Modified: vendor/clang/dist/docs/ReleaseNotes.rst ============================================================================== --- vendor/clang/dist/docs/ReleaseNotes.rst Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/docs/ReleaseNotes.rst Thu Jan 15 22:31:35 2015 (r277222) @@ -1,6 +1,6 @@ -===================================== -Clang 3.5 (In-Progress) Release Notes -===================================== +======================= +Clang 3.5 Release Notes +======================= .. contents:: :local: @@ -8,12 +8,6 @@ Clang 3.5 (In-Progress) Release Notes Written by the `LLVM Team <http://llvm.org/>`_ -.. warning:: - - These are in-progress notes for the upcoming Clang 3.5 release. You may - prefer the `Clang 3.4 Release Notes - <http://llvm.org/releases/3.4/tools/clang/docs/ReleaseNotes.html>`_. - Introduction ============ @@ -188,16 +182,6 @@ directive just prior to the desired loop interleaving to be enabled or disabled. Vector width as well as interleave count can be manually specified. See :ref:`langext-pragma-loop` for details. -C Language Changes in Clang ---------------------------- - -... - -C11 Feature Support -^^^^^^^^^^^^^^^^^^^ - -... - C++ Language Changes in Clang ----------------------------- @@ -207,8 +191,6 @@ C++ Language Changes in Clang references, and `-fsanitize=null` can be used to detect null references being formed at runtime. -- ... - C++17 Feature Support ^^^^^^^^^^^^^^^^^^^^^ @@ -227,16 +209,6 @@ Additionally, trigraphs are not recogniz Note that these features may be changed or removed in future Clang releases without notice. -Objective-C Language Changes in Clang -------------------------------------- - -... - -OpenCL C Language Changes in Clang ----------------------------------- - -... - OpenMP C/C++ Language Changes in Clang -------------------------------------- @@ -254,11 +226,6 @@ this section should help get you past th - Clang uses `std::unique_ptr<T>` in many places where it used to use raw `T *` pointers. -libclang --------- - -... - Static Analyzer --------------- @@ -282,25 +249,6 @@ instead of `report-XXXXXX.html`, scan-bu List the function/method name in the index page of scan-build. -... - -Core Analysis Improvements -========================== - -- ... - -New Issues Found -================ - -- ... - -Python Binding Changes ----------------------- - -The following methods have been added: - -- ... - Significant Known Problems ========================== Modified: vendor/clang/dist/include/clang/Basic/DiagnosticSemaKinds.td ============================================================================== --- vendor/clang/dist/include/clang/Basic/DiagnosticSemaKinds.td Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/include/clang/Basic/DiagnosticSemaKinds.td Thu Jan 15 22:31:35 2015 (r277222) @@ -2115,6 +2115,9 @@ def warn_attribute_invalid_on_definition InGroup<IgnoredAttributes>; def err_attribute_dll_redeclaration : Error< "redeclaration of %q0 cannot add %q1 attribute">; +def warn_attribute_dll_redeclaration : Warning< + "redeclaration of %q0 should not add %q1 attribute">, + InGroup<DiagGroup<"dll-attribute-on-redeclaration">>; def err_attribute_dllimport_function_definition : Error< "dllimport cannot be applied to non-inline function definition">; def err_attribute_dll_deleted : Error< Modified: vendor/clang/dist/lib/CodeGen/CGExprScalar.cpp ============================================================================== --- vendor/clang/dist/lib/CodeGen/CGExprScalar.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/lib/CodeGen/CGExprScalar.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -3216,18 +3216,26 @@ Value *ScalarExprEmitter::VisitChooseExp Value *ScalarExprEmitter::VisitVAArgExpr(VAArgExpr *VE) { QualType Ty = VE->getType(); + if (Ty->isVariablyModifiedType()) CGF.EmitVariablyModifiedType(Ty); llvm::Value *ArgValue = CGF.EmitVAListRef(VE->getSubExpr()); llvm::Value *ArgPtr = CGF.EmitVAArg(ArgValue, VE->getType()); + llvm::Type *ArgTy = ConvertType(VE->getType()); // If EmitVAArg fails, we fall back to the LLVM instruction. if (!ArgPtr) - return Builder.CreateVAArg(ArgValue, ConvertType(VE->getType())); + return Builder.CreateVAArg(ArgValue, ArgTy); // FIXME Volatility. - return Builder.CreateLoad(ArgPtr); + llvm::Value *Val = Builder.CreateLoad(ArgPtr); + + // If EmitVAArg promoted the type, we must truncate it. + if (ArgTy != Val->getType()) + Val = Builder.CreateTrunc(Val, ArgTy); + + return Val; } Value *ScalarExprEmitter::VisitBlockExpr(const BlockExpr *block) { Modified: vendor/clang/dist/lib/CodeGen/TargetInfo.cpp ============================================================================== --- vendor/clang/dist/lib/CodeGen/TargetInfo.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/lib/CodeGen/TargetInfo.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -5446,15 +5446,19 @@ MipsABIInfo::classifyArgumentType(QualTy // If we have reached here, aggregates are passed directly by coercing to // another structure type. Padding is inserted if the offset of the // aggregate is unaligned. - return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, - getPaddingType(OrigOffset, CurrOffset)); + ABIArgInfo ArgInfo = + ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, + getPaddingType(OrigOffset, CurrOffset)); + ArgInfo.setInReg(true); + return ArgInfo; } // Treat an enum type as its underlying type. if (const EnumType *EnumTy = Ty->getAs<EnumType>()) Ty = EnumTy->getDecl()->getIntegerType(); - if (Ty->isPromotableIntegerType()) + // All integral types are promoted to the GPR width. + if (Ty->isIntegralOrEnumerationType()) return ABIArgInfo::getExtend(); return ABIArgInfo::getDirect( @@ -5506,7 +5510,12 @@ MipsABIInfo::returnAggregateInRegs(QualT ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { uint64_t Size = getContext().getTypeSize(RetTy); - if (RetTy->isVoidType() || Size == 0) + if (RetTy->isVoidType()) + return ABIArgInfo::getIgnore(); + + // O32 doesn't treat zero-sized structs differently from other structs. + // However, N32/N64 ignores zero sized return values. + if (!IsO32 && Size == 0) return ABIArgInfo::getIgnore(); if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { @@ -5514,12 +5523,15 @@ ABIArgInfo MipsABIInfo::classifyReturnTy if (RetTy->isAnyComplexType()) return ABIArgInfo::getDirect(); - // O32 returns integer vectors in registers. - if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) - return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); - - if (!IsO32) - return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); + // O32 returns integer vectors in registers and N32/N64 returns all small + // aggregates in registers.. + if (!IsO32 || + (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) { + ABIArgInfo ArgInfo = + ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); + ArgInfo.setInReg(true); + return ArgInfo; + } } return ABIArgInfo::getIndirect(0); @@ -5549,11 +5561,20 @@ llvm::Value* MipsABIInfo::EmitVAArg(llvm CodeGenFunction &CGF) const { llvm::Type *BP = CGF.Int8PtrTy; llvm::Type *BPP = CGF.Int8PtrPtrTy; + + // Integer arguments are promoted 32-bit on O32 and 64-bit on N32/N64. + unsigned SlotSizeInBits = IsO32 ? 32 : 64; + if (Ty->isIntegerType() && + CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) { + Ty = CGF.getContext().getIntTypeForBitwidth(SlotSizeInBits, + Ty->isSignedIntegerType()); + } CGBuilderTy &Builder = CGF.Builder; llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); - int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; + int64_t TypeAlign = + std::min(getContext().getTypeAlign(Ty) / 8, StackAlignInBytes); llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); llvm::Value *AddrTyped; unsigned PtrWidth = getTarget().getPointerWidth(0); @@ -5572,8 +5593,8 @@ llvm::Value* MipsABIInfo::EmitVAArg(llvm llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); - uint64_t Offset = - llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); + unsigned ArgSizeInBits = CGF.getContext().getTypeSize(Ty); + uint64_t Offset = llvm::RoundUpToAlignment(ArgSizeInBits / 8, TypeAlign); llvm::Value *NextAddr = Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), "ap.next"); Modified: vendor/clang/dist/lib/Sema/SemaDecl.cpp ============================================================================== --- vendor/clang/dist/lib/Sema/SemaDecl.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/lib/Sema/SemaDecl.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -5020,7 +5020,7 @@ static void checkDLLAttributeRedeclarati NewDecl = NewTD->getTemplatedDecl(); if (!OldDecl || !NewDecl) - return; + return; const DLLImportAttr *OldImportAttr = OldDecl->getAttr<DLLImportAttr>(); const DLLExportAttr *OldExportAttr = OldDecl->getAttr<DLLExportAttr>(); @@ -5037,13 +5037,30 @@ static void checkDLLAttributeRedeclarati // Implicitly generated declarations are also excluded for now because there // is no other way to switch these to use dllimport or dllexport. bool AddsAttr = !(OldImportAttr || OldExportAttr) && HasNewAttr; + if (AddsAttr && !IsSpecialization && !OldDecl->isImplicit()) { - S.Diag(NewDecl->getLocation(), diag::err_attribute_dll_redeclaration) - << NewDecl - << (NewImportAttr ? (const Attr *)NewImportAttr : NewExportAttr); + // If the declaration hasn't been used yet, allow with a warning for + // free functions and global variables. + bool JustWarn = false; + if (!OldDecl->isUsed() && !OldDecl->isCXXClassMember()) { + auto *VD = dyn_cast<VarDecl>(OldDecl); + if (VD && !VD->getDescribedVarTemplate()) + JustWarn = true; + auto *FD = dyn_cast<FunctionDecl>(OldDecl); + if (FD && FD->getTemplatedKind() == FunctionDecl::TK_NonTemplate) + JustWarn = true; + } + + unsigned DiagID = JustWarn ? diag::warn_attribute_dll_redeclaration + : diag::err_attribute_dll_redeclaration; + S.Diag(NewDecl->getLocation(), DiagID) + << NewDecl + << (NewImportAttr ? (const Attr *)NewImportAttr : NewExportAttr); S.Diag(OldDecl->getLocation(), diag::note_previous_declaration); - NewDecl->setInvalidDecl(); - return; + if (!JustWarn) { + NewDecl->setInvalidDecl(); + return; + } } // A redeclaration is not allowed to drop a dllimport attribute, the only Modified: vendor/clang/dist/lib/Sema/SemaTemplate.cpp ============================================================================== --- vendor/clang/dist/lib/Sema/SemaTemplate.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/lib/Sema/SemaTemplate.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -3692,12 +3692,12 @@ bool Sema::CheckTemplateArgumentList(Tem ArgumentPack.size(), Converted)) return true; - if (TemplateArgs[ArgIdx].getArgument().isPackExpansion() && - isa<TypeAliasTemplateDecl>(Template) && - !(Param + 1 == ParamEnd && (*Param)->isTemplateParameterPack() && - !getExpandedPackSize(*Param))) { + bool PackExpansionIntoNonPack = + TemplateArgs[ArgIdx].getArgument().isPackExpansion() && + (!(*Param)->isTemplateParameterPack() || getExpandedPackSize(*Param)); + if (PackExpansionIntoNonPack && isa<TypeAliasTemplateDecl>(Template)) { // Core issue 1430: we have a pack expansion as an argument to an - // alias template, and it's not part of a final parameter pack. This + // alias template, and it's not part of a parameter pack. This // can't be canonicalized, so reject it now. Diag(TemplateArgs[ArgIdx].getLocation(), diag::err_alias_template_expansion_into_fixed_list) @@ -3720,16 +3720,11 @@ bool Sema::CheckTemplateArgumentList(Tem ++Param; } - // If we just saw a pack expansion, then directly convert the remaining - // arguments, because we don't know what parameters they'll match up - // with. - if (TemplateArgs[ArgIdx-1].getArgument().isPackExpansion()) { - bool InFinalParameterPack = Param != ParamEnd && - Param + 1 == ParamEnd && - (*Param)->isTemplateParameterPack() && - !getExpandedPackSize(*Param); - - if (!InFinalParameterPack && !ArgumentPack.empty()) { + // If we just saw a pack expansion into a non-pack, then directly convert + // the remaining arguments, because we don't know what parameters they'll + // match up with. + if (PackExpansionIntoNonPack) { + if (!ArgumentPack.empty()) { // If we were part way through filling in an expanded parameter pack, // fall back to just producing individual arguments. Converted.insert(Converted.end(), @@ -3738,22 +3733,10 @@ bool Sema::CheckTemplateArgumentList(Tem } while (ArgIdx < NumArgs) { - if (InFinalParameterPack) - ArgumentPack.push_back(TemplateArgs[ArgIdx].getArgument()); - else - Converted.push_back(TemplateArgs[ArgIdx].getArgument()); + Converted.push_back(TemplateArgs[ArgIdx].getArgument()); ++ArgIdx; } - // Push the argument pack onto the list of converted arguments. - if (InFinalParameterPack) { - Converted.push_back( - TemplateArgument::CreatePackCopy(Context, - ArgumentPack.data(), - ArgumentPack.size())); - ArgumentPack.clear(); - } - return false; } Modified: vendor/clang/dist/test/CodeGen/atomics-inlining.c ============================================================================== --- vendor/clang/dist/test/CodeGen/atomics-inlining.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/atomics-inlining.c Thu Jan 15 22:31:35 2015 (r277222) @@ -76,8 +76,8 @@ void test1(void) { // MIPS32: store atomic i32 {{.*}}, i32* @i1 seq_cst // MIPS32: call i64 @__atomic_load_8(i8* bitcast (i64* @ll1 to i8*) // MIPS32: call void @__atomic_store_8(i8* bitcast (i64* @ll1 to i8*), i64 -// MIPS32: call void @__atomic_load(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) -// MIPS32: call void @__atomic_store(i32 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_load(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) +// MIPS32: call void @__atomic_store(i32 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) // MIPS64-LABEL: define void @test1 // MIPS64: = load atomic i8* @c1 seq_cst @@ -88,6 +88,6 @@ void test1(void) { // MIPS64: store atomic i32 {{.*}}, i32* @i1 seq_cst // MIPS64: = load atomic i64* @ll1 seq_cst // MIPS64: store atomic i64 {{.*}}, i64* @ll1 seq_cst -// MIPS64: call void @__atomic_load(i64 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0) -// MIPS64: call void @__atomic_store(i64 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) +// MIPS64: call void @__atomic_load(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0) +// MIPS64: call void @__atomic_store(i64 zeroext 100, i8* getelementptr inbounds ([100 x i8]* @a1, i32 0, i32 0), i8* getelementptr inbounds ([100 x i8]* @a2, i32 0, i32 0) } Modified: vendor/clang/dist/test/CodeGen/mips-byval-arg.c ============================================================================== --- vendor/clang/dist/test/CodeGen/mips-byval-arg.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/mips-byval-arg.c Thu Jan 15 22:31:35 2015 (r277222) @@ -7,8 +7,8 @@ typedef struct { extern void foo2(S0); -// O32-LABEL: define void @foo1(i32 %a0.coerce0, i32 %a0.coerce1, i32 %a0.coerce2) -// N64-LABEL: define void @foo1(i64 %a0.coerce0, i32 %a0.coerce1) +// O32-LABEL: define void @foo1(i32 inreg %a0.coerce0, i32 inreg %a0.coerce1, i32 inreg %a0.coerce2) +// N64-LABEL: define void @foo1(i64 inreg %a0.coerce0, i32 inreg %a0.coerce1) void foo1(S0 a0) { foo2(a0); Added: vendor/clang/dist/test/CodeGen/mips-varargs.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist/test/CodeGen/mips-varargs.c Thu Jan 15 22:31:35 2015 (r277222) @@ -0,0 +1,176 @@ +// RUN: %clang_cc1 -triple mips-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 +// RUN: %clang_cc1 -triple mipsel-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm -target-abi n32 %s | FileCheck %s -check-prefix=ALL -check-prefix=N32 -check-prefix=NEW +// RUN: %clang_cc1 -triple mips64-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW +// RUN: %clang_cc1 -triple mips64el-unknown-linux -o - -O1 -emit-llvm %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NEW + +#include <stdarg.h> + +typedef int v4i32 __attribute__ ((__vector_size__ (16))); + +int test_i32(char *fmt, ...) { + va_list va; + + va_start(va, fmt); + int v = va_arg(va, int); + va_end(va); + + return v; +} + +// ALL-LABEL: define i32 @test_i32(i8*{{.*}} %fmt, ...) +// +// O32: %va = alloca i8*, align [[PTRALIGN:4]] +// N32: %va = alloca i8*, align [[PTRALIGN:4]] +// N64: %va = alloca i8*, align [[PTRALIGN:8]] +// +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8* +// ALL: call void @llvm.va_start(i8* [[VA1]]) +// +// ALL: [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]] +// +// O32: [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i32* +// NEW: [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i64* +// +// O32: [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], i32 4 +// NEW: [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], {{i32|i64}} 8 +// +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] +// +// O32: [[ARG1:%.+]] = load i32* [[TMP0]], align 4 +// NEW: [[TMP2:%.+]] = load i64* [[TMP0]], align 8 +// NEW: [[ARG1:%.+]] = trunc i64 [[TMP2]] to i32 +// +// ALL: call void @llvm.va_end(i8* [[VA1]]) +// ALL: ret i32 [[ARG1]] +// ALL: } + +int test_i32_2args(char *fmt, ...) { + va_list va; + + va_start(va, fmt); + int v1 = va_arg(va, int); + int v2 = va_arg(va, int); + va_end(va); + + return v1 + v2; +} + +// ALL-LABEL: define i32 @test_i32_2args(i8*{{.*}} %fmt, ...) +// +// ALL: %va = alloca i8*, align [[PTRALIGN]] +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8* +// ALL: call void @llvm.va_start(i8* [[VA1]]) +// +// ALL: [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]] +// +// O32: [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i32* +// NEW: [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i64* +// +// O32: [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], i32 4 +// NEW: [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], [[INTPTR_T:i32|i64]] 8 +// +// O32: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] +// FIXME: N32 optimised this store out. Why only for this ABI? +// N64: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] +// +// O32: [[ARG1:%.+]] = load i32* [[TMP0]], align 4 +// NEW: [[TMP3:%.+]] = load i64* [[TMP0]], align 8 +// NEW: [[ARG1:%.+]] = trunc i64 [[TMP3]] to i32 +// +// O32: [[TMP1:%.+]] = bitcast i8* [[AP_NEXT]] to i32* +// NEW: [[TMP1:%.+]] = bitcast i8* [[AP_NEXT]] to i64* +// +// O32: [[AP_NEXT3:%.+]] = getelementptr i8* [[AP_CUR]], i32 8 +// NEW: [[AP_NEXT3:%.+]] = getelementptr i8* [[AP_CUR]], [[INTPTR_T]] 16 +// +// ALL: store i8* [[AP_NEXT3]], i8** %va, align [[PTRALIGN]] +// +// O32: [[ARG2:%.+]] = load i32* [[TMP1]], align 4 +// NEW: [[TMP4:%.+]] = load i64* [[TMP1]], align 8 +// NEW: [[ARG2:%.+]] = trunc i64 [[TMP4]] to i32 +// +// ALL: call void @llvm.va_end(i8* [[VA1]]) +// ALL: [[ADD:%.+]] = add nsw i32 [[ARG2]], [[ARG1]] +// ALL: ret i32 [[ADD]] +// ALL: } + +long long test_i64(char *fmt, ...) { + va_list va; + + va_start(va, fmt); + long long v = va_arg(va, long long); + va_end(va); + + return v; +} + +// ALL-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...) +// +// ALL: %va = alloca i8*, align [[PTRALIGN]] +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8* +// ALL: call void @llvm.va_start(i8* [[VA1]]) +// +// ALL: [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]] +// +// NEW: [[TMP0:%.+]] = bitcast i8* [[AP_CUR]] to i64* +// +// i64 is 8-byte aligned, while this is within O32's stack alignment there's no +// guarantee that the offset is still 8-byte aligned after earlier reads. +// O32: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[INTPTR_T:i32]] +// O32: [[PTR1:%.+]] = add i32 [[PTR0]], 7 +// O32: [[PTR2:%.+]] = and i32 [[PTR1]], -8 +// O32: [[PTR3:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i64* +// O32: [[PTR4:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i8* +// +// O32: [[AP_NEXT:%.+]] = getelementptr i8* [[PTR4]], [[INTPTR_T]] 8 +// NEW: [[AP_NEXT:%.+]] = getelementptr i8* [[AP_CUR]], [[INTPTR_T]] 8 +// +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] +// +// O32: [[ARG1:%.+]] = load i64* [[PTR3]], align 8 +// NEW: [[ARG1:%.+]] = load i64* [[TMP0]], align 8 +// +// ALL: call void @llvm.va_end(i8* [[VA1]]) +// ALL: ret i64 [[ARG1]] +// ALL: } + +int test_v4i32(char *fmt, ...) { + va_list va; + + va_start(va, fmt); + v4i32 v = va_arg(va, v4i32); + va_end(va); + + return v[0]; +} + +// ALL-LABEL: define i32 @test_v4i32(i8*{{.*}} %fmt, ...) +// +// ALL: %va = alloca i8*, align [[PTRALIGN]] +// ALL: [[VA1:%.+]] = bitcast i8** %va to i8* +// ALL: call void @llvm.va_start(i8* [[VA1]]) +// ALL: [[AP_CUR:%.+]] = load i8** %va, align [[PTRALIGN]] +// +// O32: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[INTPTR_T:i32]] +// N32: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[INTPTR_T:i32]] +// N64: [[PTR0:%.+]] = ptrtoint i8* [[AP_CUR]] to [[INTPTR_T:i64]] +// +// Vectors are 16-byte aligned, however the O32 ABI has a maximum alignment of +// 8-bytes since the base of the stack is 8-byte aligned. +// O32: [[PTR1:%.+]] = add i32 [[PTR0]], 7 +// O32: [[PTR2:%.+]] = and i32 [[PTR1]], -8 +// +// NEW: [[PTR1:%.+]] = add [[INTPTR_T]] [[PTR0]], 15 +// NEW: [[PTR2:%.+]] = and [[INTPTR_T]] [[PTR1]], -16 +// +// ALL: [[PTR3:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to <4 x i32>* +// ALL: [[PTR4:%.+]] = inttoptr [[INTPTR_T]] [[PTR2]] to i8* +// ALL: [[AP_NEXT:%.+]] = getelementptr i8* [[PTR4]], [[INTPTR_T]] 16 +// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] +// ALL: [[PTR5:%.+]] = load <4 x i32>* [[PTR3]], align 16 +// ALL: call void @llvm.va_end(i8* [[VA1]]) +// ALL: [[VECEXT:%.+]] = extractelement <4 x i32> [[PTR5]], i32 0 +// ALL: ret i32 [[VECEXT]] +// ALL: } Modified: vendor/clang/dist/test/CodeGen/mips-vector-arg.c ============================================================================== --- vendor/clang/dist/test/CodeGen/mips-vector-arg.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/mips-vector-arg.c Thu Jan 15 22:31:35 2015 (r277222) @@ -8,19 +8,19 @@ typedef float v4sf __attribute__ ((__vector_size__ (16))); typedef int v4i32 __attribute__ ((__vector_size__ (16))); -// O32: define void @test_v4sf(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW:#[0-9]+]] -// O32: declare i32 @test_v4sf_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -// N64: define void @test_v4sf(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW:#[0-9]+]] -// N64: declare i32 @test_v4sf_2(i64, i64, i32, i64, i64, i64) +// O32: define void @test_v4sf(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) [[NUW:#[0-9]+]] +// O32: declare i32 @test_v4sf_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) +// N64: define void @test_v4sf(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) [[NUW:#[0-9]+]] +// N64: declare i32 @test_v4sf_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) extern test_v4sf_2(v4sf, int, v4sf); void test_v4sf(v4sf a1, int a2, v4sf a3) { test_v4sf_2(a3, a2, a1); } -// O32: define void @test_v4i32(i32 %a1.coerce0, i32 %a1.coerce1, i32 %a1.coerce2, i32 %a1.coerce3, i32 %a2, i32, i32 %a3.coerce0, i32 %a3.coerce1, i32 %a3.coerce2, i32 %a3.coerce3) [[NUW]] -// O32: declare i32 @test_v4i32_2(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -// N64: define void @test_v4i32(i64 %a1.coerce0, i64 %a1.coerce1, i32 %a2, i64, i64 %a3.coerce0, i64 %a3.coerce1) [[NUW]] -// N64: declare i32 @test_v4i32_2(i64, i64, i32, i64, i64, i64) +// O32: define void @test_v4i32(i32 inreg %a1.coerce0, i32 inreg %a1.coerce1, i32 inreg %a1.coerce2, i32 inreg %a1.coerce3, i32 signext %a2, i32, i32 inreg %a3.coerce0, i32 inreg %a3.coerce1, i32 inreg %a3.coerce2, i32 inreg %a3.coerce3) [[NUW]] +// O32: declare i32 @test_v4i32_2(i32 inreg, i32 inreg, i32 inreg, i32 inreg, i32 signext, i32, i32 inreg, i32 inreg, i32 inreg, i32 inreg) +// N64: define void @test_v4i32(i64 inreg %a1.coerce0, i64 inreg %a1.coerce1, i32 signext %a2, i64, i64 inreg %a3.coerce0, i64 inreg %a3.coerce1) [[NUW]] +// N64: declare i32 @test_v4i32_2(i64 inreg, i64 inreg, i32 signext, i64, i64 inreg, i64 inreg) extern test_v4i32_2(v4i32, int, v4i32); void test_v4i32(v4i32 a1, int a2, v4i32 a3) { test_v4i32_2(a3, a2, a1); Modified: vendor/clang/dist/test/CodeGen/mips-vector-return.c ============================================================================== --- vendor/clang/dist/test/CodeGen/mips-vector-return.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/mips-vector-return.c Thu Jan 15 22:31:35 2015 (r277222) @@ -9,7 +9,7 @@ typedef double v4df __attribute__ ((__ve typedef int v4i32 __attribute__ ((__vector_size__ (16))); // O32-LABEL: define void @test_v4sf(<4 x float>* noalias nocapture sret -// N64: define { i64, i64 } @test_v4sf +// N64: define inreg { i64, i64 } @test_v4sf v4sf test_v4sf(float a) { return (v4sf){0.0f, a, 0.0f, 0.0f}; } @@ -23,8 +23,8 @@ v4df test_v4df(double a) { // O32 returns integer vectors whose size is equal to or smaller than 16-bytes // in integer registers. // -// O32: define { i32, i32, i32, i32 } @test_v4i32 -// N64: define { i64, i64 } @test_v4i32 +// O32: define inreg { i32, i32, i32, i32 } @test_v4i32 +// N64: define inreg { i64, i64 } @test_v4i32 v4i32 test_v4i32(int a) { return (v4i32){0, a, 0, 0}; } Added: vendor/clang/dist/test/CodeGen/mips-zero-sized-struct.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist/test/CodeGen/mips-zero-sized-struct.c Thu Jan 15 22:31:35 2015 (r277222) @@ -0,0 +1,16 @@ +// RUN: %clang -target mips-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=O32 %s +// RUN: %clang -target mipsel-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=O32 %s +// RUN: %clang -target mips64-unknown-linux-gnu -S -emit-llvm -o - %s -mabi=n32 | FileCheck -check-prefix=N32 %s +// RUN: %clang -target mips64el-unknown-linux-gnu -S -emit-llvm -o - %s -mabi=n32 | FileCheck -check-prefix=N32 %s +// RUN: %clang -target mips64-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s +// RUN: %clang -target mips64el-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=N64 %s + +// O32: define void @fn28(%struct.T2* noalias sret %agg.result, i8 signext %arg0) +// N32: define void @fn28(i8 signext %arg0) +// N64: define void @fn28(i8 signext %arg0) + +typedef struct T2 { } T2; +T2 T2_retval; +T2 fn28(char arg0) { + return T2_retval; +} Modified: vendor/clang/dist/test/CodeGen/mips64-class-return.cpp ============================================================================== --- vendor/clang/dist/test/CodeGen/mips64-class-return.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/mips64-class-return.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -24,22 +24,22 @@ extern D0 gd0; extern D1 gd1; extern D2 gd2; -// CHECK: define { i64, i64 } @_Z4foo1v() +// CHECK: define inreg { i64, i64 } @_Z4foo1v() D0 foo1(void) { return gd0; } -// CHECK: define { double, float } @_Z4foo2v() +// CHECK: define inreg { double, float } @_Z4foo2v() D1 foo2(void) { return gd1; } -// CHECK-LABEL: define void @_Z4foo32D2(i64 %a0.coerce0, double %a0.coerce1) +// CHECK-LABEL: define void @_Z4foo32D2(i64 inreg %a0.coerce0, double inreg %a0.coerce1) void foo3(D2 a0) { gd2 = a0; } -// CHECK-LABEL: define void @_Z4foo42D0(i64 %a0.coerce0, i64 %a0.coerce1) +// CHECK-LABEL: define void @_Z4foo42D0(i64 inreg %a0.coerce0, i64 inreg %a0.coerce1) void foo4(D0 a0) { gd0 = a0; } Modified: vendor/clang/dist/test/CodeGen/mips64-padding-arg.c ============================================================================== --- vendor/clang/dist/test/CodeGen/mips64-padding-arg.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGen/mips64-padding-arg.c Thu Jan 15 22:31:35 2015 (r277222) @@ -9,9 +9,9 @@ typedef struct { // Insert padding to ensure arguments of type S0 are aligned to 16-byte boundaries. -// N64-LABEL: define void @foo1(i32 %a0, i64, double %a1.coerce0, i64 %a1.coerce1, i64 %a1.coerce2, i64 %a1.coerce3, double %a2.coerce0, i64 %a2.coerce1, i64 %a2.coerce2, i64 %a2.coerce3, i32 %b, i64, double %a3.coerce0, i64 %a3.coerce1, i64 %a3.coerce2, i64 %a3.coerce3) -// N64: tail call void @foo2(i32 1, i32 2, i32 %a0, i64 undef, double %a1.coerce0, i64 %a1.coerce1, i64 %a1.coerce2, i64 %a1.coerce3, double %a2.coerce0, i64 %a2.coerce1, i64 %a2.coerce2, i64 %a2.coerce3, i32 3, i64 undef, double %a3.coerce0, i64 %a3.coerce1, i64 %a3.coerce2, i64 %a3.coerce3) -// N64: declare void @foo2(i32, i32, i32, i64, double, i64, i64, i64, double, i64, i64, i64, i32, i64, double, i64, i64, i64) +// N64-LABEL: define void @foo1(i32 signext %a0, i64, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext %b, i64, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3) +// N64: tail call void @foo2(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, double inreg %a1.coerce0, i64 inreg %a1.coerce1, i64 inreg %a1.coerce2, i64 inreg %a1.coerce3, double inreg %a2.coerce0, i64 inreg %a2.coerce1, i64 inreg %a2.coerce2, i64 inreg %a2.coerce3, i32 signext 3, i64 undef, double inreg %a3.coerce0, i64 inreg %a3.coerce1, i64 inreg %a3.coerce2, i64 inreg %a3.coerce3) +// N64: declare void @foo2(i32 signext, i32 signext, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg, double inreg, i64 inreg, i64 inreg, i64 inreg, i32 signext, i64, double inreg, i64 inreg, i64 inreg, i64 inreg) extern void foo2(int, int, int, S0, S0, int, S0); @@ -21,9 +21,9 @@ void foo1(int a0, S0 a1, S0 a2, int b, S // Insert padding before long double argument. // -// N64-LABEL: define void @foo3(i32 %a0, i64, fp128 %a1) -// N64: tail call void @foo4(i32 1, i32 2, i32 %a0, i64 undef, fp128 %a1) -// N64: declare void @foo4(i32, i32, i32, i64, fp128) +// N64-LABEL: define void @foo3(i32 signext %a0, i64, fp128 %a1) +// N64: tail call void @foo4(i32 signext 1, i32 signext 2, i32 signext %a0, i64 undef, fp128 %a1) +// N64: declare void @foo4(i32 signext, i32 signext, i32 signext, i64, fp128) extern void foo4(int, int, int, long double); @@ -34,8 +34,8 @@ void foo3(int a0, long double a1) { // Insert padding after hidden argument. // // N64-LABEL: define void @foo5(%struct.S0* noalias sret %agg.result, i64, fp128 %a0) -// N64: call void @foo6(%struct.S0* sret %agg.result, i32 1, i32 2, i64 undef, fp128 %a0) -// N64: declare void @foo6(%struct.S0* sret, i32, i32, i64, fp128) +// N64: call void @foo6(%struct.S0* sret %agg.result, i32 signext 1, i32 signext 2, i64 undef, fp128 %a0) +// N64: declare void @foo6(%struct.S0* sret, i32 signext, i32 signext, i64, fp128) extern S0 foo6(int, int, long double); @@ -55,7 +55,7 @@ void foo7(float a0, double a1) { } // O32-LABEL: define void @foo9() -// O32: declare void @foo10(i32, i32 +// O32: declare void @foo10(i32 signext, i32 typedef struct __attribute__((aligned(16))) { int a; Modified: vendor/clang/dist/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp ============================================================================== --- vendor/clang/dist/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/CodeGenCXX/mips-size_t-ptrdiff_t.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -10,13 +10,13 @@ long *alloc_long() { return rv; } // O32-LABEL: define i32* @_Z10alloc_longv() -// O32: call noalias i8* @_Znwj(i32 4) +// O32: call noalias i8* @_Znwj(i32 zeroext 4) // N32-LABEL: define i32* @_Z10alloc_longv() -// N32: call noalias i8* @_Znwj(i32 4) +// N32: call noalias i8* @_Znwj(i32 zeroext 4) // N64-LABEL: define i64* @_Z10alloc_longv() -// N64: call noalias i8* @_Znwm(i64 8) +// N64: call noalias i8* @_Znwm(i64 zeroext 8) long *alloc_long_array() { long *rv = new long[2]; @@ -24,13 +24,13 @@ long *alloc_long_array() { } // O32-LABEL: define i32* @_Z16alloc_long_arrayv() -// O32: call noalias i8* @_Znaj(i32 8) +// O32: call noalias i8* @_Znaj(i32 zeroext 8) // N32-LABEL: define i32* @_Z16alloc_long_arrayv() -// N32: call noalias i8* @_Znaj(i32 8) +// N32: call noalias i8* @_Znaj(i32 zeroext 8) // N64-LABEL: define i64* @_Z16alloc_long_arrayv() -// N64: call noalias i8* @_Znam(i64 16) +// N64: call noalias i8* @_Znam(i64 zeroext 16) #include <stddef.h> Modified: vendor/clang/dist/test/Driver/cl-x86-flags.c ============================================================================== --- vendor/clang/dist/test/Driver/cl-x86-flags.c Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/Driver/cl-x86-flags.c Thu Jan 15 22:31:35 2015 (r277222) @@ -9,73 +9,73 @@ // MFLAGS-NOT: argument unused during compilation // -arch:IA32 is no-op. -// RUN: %clang_cl -m32 -arch:IA32 -### -- 2>&1 %s | FileCheck -check-prefix=IA32 %s +// RUN: %clang_cl -m32 -arch:IA32 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=IA32 %s // IA32-NOT: argument unused during compilation // IA32-NOT: -target-feature -// RUN: %clang_cl -m32 -arch:ia32 -### -- 2>&1 %s | FileCheck -check-prefix=ia32 %s +// RUN: %clang_cl -m32 -arch:ia32 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=ia32 %s // ia32: argument unused during compilation // ia32-NOT: -target-feature -// RUN: %clang_cl -m64 -arch:IA32 -### -- 2>&1 %s | FileCheck -check-prefix=IA3264 %s +// RUN: %clang_cl -m64 -arch:IA32 --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=IA3264 %s // IA3264: argument unused during compilation // IA3264-NOT: -target-feature -// RUN: %clang_cl -m32 -arch:SSE -### -- 2>&1 %s | FileCheck -check-prefix=SSE %s +// RUN: %clang_cl -m32 -arch:SSE --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=SSE %s // SSE: -target-feature // SSE: +sse // SSE-NOT: argument unused during compilation -// RUN: %clang_cl -m32 -arch:sse -### -- 2>&1 %s | FileCheck -check-prefix=sse %s +// RUN: %clang_cl -m32 -arch:sse --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=sse %s // sse: argument unused during compilation // sse-NOT: -target-feature -// RUN: %clang_cl -m32 -arch:SSE2 -### -- 2>&1 %s | FileCheck -check-prefix=SSE2 %s +// RUN: %clang_cl -m32 -arch:SSE2 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=SSE2 %s // SSE2: -target-feature // SSE2: +sse2 // SSE2-NOT: argument unused during compilation -// RUN: %clang_cl -m32 -arch:sse2 -### -- 2>&1 %s | FileCheck -check-prefix=sse %s +// RUN: %clang_cl -m32 -arch:sse2 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=sse %s // sse2: argument unused during compilation // sse2-NOT: -target-feature -// RUN: %clang_cl -m64 -arch:SSE -### -- 2>&1 %s | FileCheck -check-prefix=SSE64 %s +// RUN: %clang_cl -m64 -arch:SSE --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=SSE64 %s // SSE64: argument unused during compilation // SSE64-NOT: -target-feature -// RUN: %clang_cl -m64 -arch:SSE2 -### -- 2>&1 %s | FileCheck -check-prefix=SSE264 %s +// RUN: %clang_cl -m64 -arch:SSE2 --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=SSE264 %s // SSE264: argument unused during compilation // SSE264-NOT: -target-feature -// RUN: %clang_cl -m32 -arch:AVX -### -- 2>&1 %s | FileCheck -check-prefix=AVX %s +// RUN: %clang_cl -m32 -arch:AVX --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=AVX %s // AVX: -target-feature // AVX: +avx -// RUN: %clang_cl -m32 -arch:avx -### -- 2>&1 %s | FileCheck -check-prefix=avx %s +// RUN: %clang_cl -m32 -arch:avx --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=avx %s // avx: argument unused during compilation // avx-NOT: -target-feature -// RUN: %clang_cl -m32 -arch:AVX2 -### -- 2>&1 %s | FileCheck -check-prefix=AVX2 %s +// RUN: %clang_cl -m32 -arch:AVX2 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=AVX2 %s // AVX2: -target-feature // AVX2: +avx2 -// RUN: %clang_cl -m32 -arch:avx2 -### -- 2>&1 %s | FileCheck -check-prefix=avx2 %s +// RUN: %clang_cl -m32 -arch:avx2 --target=i386 -### -- 2>&1 %s | FileCheck -check-prefix=avx2 %s // avx2: argument unused during compilation // avx2-NOT: -target-feature -// RUN: %clang_cl -m64 -arch:AVX -### -- 2>&1 %s | FileCheck -check-prefix=AVX64 %s +// RUN: %clang_cl -m64 -arch:AVX --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=AVX64 %s // AVX64: -target-feature // AVX64: +avx -// RUN: %clang_cl -m64 -arch:avx -### -- 2>&1 %s | FileCheck -check-prefix=avx64 %s +// RUN: %clang_cl -m64 -arch:avx --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=avx64 %s // avx64: argument unused during compilation // avx64-NOT: -target-feature -// RUN: %clang_cl -m64 -arch:AVX2 -### -- 2>&1 %s | FileCheck -check-prefix=AVX264 %s +// RUN: %clang_cl -m64 -arch:AVX2 --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=AVX264 %s // AVX264: -target-feature // AVX264: +avx2 -// RUN: %clang_cl -m64 -arch:avx2 -### -- 2>&1 %s | FileCheck -check-prefix=avx264 %s +// RUN: %clang_cl -m64 -arch:avx2 --target=x86_64 -### -- 2>&1 %s | FileCheck -check-prefix=avx264 %s // avx264: argument unused during compilation // avx264-NOT: -target-feature Modified: vendor/clang/dist/test/Driver/mips-cs.cpp ============================================================================== --- vendor/clang/dist/test/Driver/mips-cs.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/Driver/mips-cs.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -17,6 +17,7 @@ // CHECK-BE-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-HF-32: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-32: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc" +// CHECK-BE-HF-32: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-HF-32: "[[TC]]{{/|\\\\}}crtbegin.o" @@ -44,6 +45,7 @@ // CHECK-BE-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-HF-16: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-16: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/mips16" +// CHECK-BE-HF-16: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-HF-16: "[[TC]]/mips16{{/|\\\\}}crtbegin.o" @@ -72,6 +74,7 @@ // CHECK-BE-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-HF-MICRO: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-MICRO: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/micromips" +// CHECK-BE-HF-MICRO: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-HF-MICRO: "[[TC]]/micromips{{/|\\\\}}crtbegin.o" @@ -100,6 +103,7 @@ // CHECK-BE-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-HF-NAN: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-NAN: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/nan2008" +// CHECK-BE-HF-NAN: "-dynamic-linker" "/lib/ld-linux-mipsn8.so.1" // CHECK-BE-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/nan2008/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/nan2008/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-HF-NAN: "[[TC]]/nan2008{{/|\\\\}}crtbegin.o" @@ -128,6 +132,7 @@ // CHECK-BE-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-SF-32: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-SF-32: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/soft-float" +// CHECK-BE-SF-32: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-SF-32: "[[TC]]/soft-float{{/|\\\\}}crtbegin.o" @@ -156,6 +161,7 @@ // CHECK-BE-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-SF-16: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-SF-16: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float" +// CHECK-BE-SF-16: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-SF-16: "[[TC]]/mips16/soft-float{{/|\\\\}}crtbegin.o" @@ -184,6 +190,7 @@ // CHECK-BE-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-SF-MICRO: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-SF-MICRO: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float" +// CHECK-BE-SF-MICRO: "-dynamic-linker" "/lib/ld.so.1" // CHECK-BE-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-BE-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-BE-SF-MICRO: "[[TC]]/micromips/soft-float{{/|\\\\}}crtbegin.o" @@ -212,6 +219,7 @@ // CHECK-BE-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-HF-64: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-64: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc" +// CHECK-BE-HF-64: "-dynamic-linker" "/lib64/ld.so.1" // CHECK-BE-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/lib/../lib64{{/|\\\\}}crt1.o" // CHECK-BE-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/lib/../lib64{{/|\\\\}}crti.o" // CHECK-BE-HF-64: "[[TC]]/64{{/|\\\\}}crtbegin.o" @@ -240,6 +248,7 @@ // CHECK-BE-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-BE-SF-64: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-SF-64: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/soft-float" +// CHECK-BE-SF-64: "-dynamic-linker" "/lib64/ld.so.1" // CHECK-BE-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/usr/lib/../lib64{{/|\\\\}}crt1.o" // CHECK-BE-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/usr/lib/../lib64{{/|\\\\}}crti.o" // CHECK-BE-SF-64: "[[TC]]/soft-float/64{{/|\\\\}}crtbegin.o" @@ -268,6 +277,7 @@ // CHECK-EL-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-HF-32: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-HF-32: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/el" +// CHECK-EL-HF-32: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-HF-32: "[[TC]]/../../../../mips-linux-gnu/libc/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-HF-32: "[[TC]]/el{{/|\\\\}}crtbegin.o" @@ -296,6 +306,7 @@ // CHECK-EL-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-HF-16: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-HF-16: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/mips16/el" +// CHECK-EL-HF-16: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-HF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-HF-16: "[[TC]]/mips16/el{{/|\\\\}}crtbegin.o" @@ -324,6 +335,7 @@ // CHECK-EL-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-HF-MICRO: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-HF-MICRO: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/micromips/el" +// CHECK-EL-HF-MICRO: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-HF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-HF-MICRO: "[[TC]]/micromips/el{{/|\\\\}}crtbegin.o" @@ -352,6 +364,7 @@ // CHECK-EL-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-HF-NAN: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-HF-NAN: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/nan2008/el" +// CHECK-EL-HF-NAN: "-dynamic-linker" "/lib/ld-linux-mipsn8.so.1" // CHECK-EL-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/nan2008/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-HF-NAN: "[[TC]]/../../../../mips-linux-gnu/libc/nan2008/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-HF-NAN: "[[TC]]/nan2008/el{{/|\\\\}}crtbegin.o" @@ -380,6 +393,7 @@ // CHECK-EL-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-SF-32: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-SF-32: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el" +// CHECK-EL-SF-32: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-SF-32: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-SF-32: "[[TC]]/soft-float/el{{/|\\\\}}crtbegin.o" @@ -408,6 +422,7 @@ // CHECK-EL-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-SF-16: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-SF-16: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float/el" +// CHECK-EL-SF-16: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-SF-16: "[[TC]]/../../../../mips-linux-gnu/libc/mips16/soft-float/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-SF-16: "[[TC]]/mips16/soft-float/el{{/|\\\\}}crtbegin.o" @@ -436,6 +451,7 @@ // CHECK-EL-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-SF-MICRO: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-SF-MICRO: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float/el" +// CHECK-EL-SF-MICRO: "-dynamic-linker" "/lib/ld.so.1" // CHECK-EL-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float/el/usr/lib/../lib{{/|\\\\}}crt1.o" // CHECK-EL-SF-MICRO: "[[TC]]/../../../../mips-linux-gnu/libc/micromips/soft-float/el/usr/lib/../lib{{/|\\\\}}crti.o" // CHECK-EL-SF-MICRO: "[[TC]]/micromips/soft-float/el{{/|\\\\}}crtbegin.o" @@ -464,6 +480,7 @@ // CHECK-EL-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-HF-64: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-HF-64: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/el" +// CHECK-EL-HF-64: "-dynamic-linker" "/lib64/ld.so.1" // CHECK-EL-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/el/usr/lib/../lib64{{/|\\\\}}crt1.o" // CHECK-EL-HF-64: "[[TC]]/../../../../mips-linux-gnu/libc/el/usr/lib/../lib64{{/|\\\\}}crti.o" // CHECK-EL-HF-64: "[[TC]]/el/64{{/|\\\\}}crtbegin.o" @@ -492,6 +509,7 @@ // CHECK-EL-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/usr/include" // CHECK-EL-SF-64: "{{.*}}ld{{(.exe)?}}" // CHECK-EL-SF-64: "--sysroot=[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el" +// CHECK-EL-SF-64: "-dynamic-linker" "/lib64/ld.so.1" // CHECK-EL-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el/usr/lib/../lib64{{/|\\\\}}crt1.o" // CHECK-EL-SF-64: "[[TC]]/../../../../mips-linux-gnu/libc/soft-float/el/usr/lib/../lib64{{/|\\\\}}crti.o" // CHECK-EL-SF-64: "[[TC]]/soft-float/el/64{{/|\\\\}}crtbegin.o" Modified: vendor/clang/dist/test/Driver/mips-fsf.cpp ============================================================================== --- vendor/clang/dist/test/Driver/mips-fsf.cpp Thu Jan 15 22:31:11 2015 (r277221) +++ vendor/clang/dist/test/Driver/mips-fsf.cpp Thu Jan 15 22:31:35 2015 (r277222) @@ -17,6 +17,7 @@ // CHECK-BE-HF-32: "[[TC]]/../../../../sysroot/usr/include" // CHECK-BE-HF-32: "{{.*}}ld{{(.exe)?}}" // CHECK-BE-HF-32: "--sysroot=[[TC]]/../../../../sysroot/mips32" +// CHECK-BE-HF-32: "-dynamic-linker" "/lib/ld.so.1" *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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