Date: Fri, 12 Jan 2018 14:52:02 +0000 From: Andrew Turner <andrew@freebsd.org> To: Warner Losh <imp@bsdimp.com> Cc: Marcin Wojtas <mw@semihalf.com>, src-committers <src-committers@freebsd.org>, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r327876 - in head/sys/arm64: arm64 include Message-ID: <AB05E4EE-0B08-43F7-AA89-8B104B99E6B2@freebsd.org> In-Reply-To: <CANCZdfpfEJcxdGeya1_6jT=RKdT8VUw%2BY7Ma2Z=%2Bk6DY_XaG4g@mail.gmail.com> References: <201801121401.w0CE1cW4058239@repo.freebsd.org> <CAPv3WKcESa_AL=R-BFwef2GXxHcYsnmbUOV3Zx5qL8WdMS-o3Q@mail.gmail.com> <FEDCB2AD-AFF1-4C10-9191-76601A66BC1D@freebsd.org> <CANCZdfpfEJcxdGeya1_6jT=RKdT8VUw%2BY7Ma2Z=%2Bk6DY_XaG4g@mail.gmail.com>
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> On 12 Jan 2018, at 14:37, Warner Losh <imp@bsdimp.com> wrote: >=20 >=20 >=20 > On Fri, Jan 12, 2018 at 7:15 AM, Andrew Turner <andrew@freebsd.org = <mailto:andrew@freebsd.org>> wrote: >=20 >=20 >> On 12 Jan 2018, at 14:10, Marcin Wojtas <mw@semihalf.com = <mailto:mw@semihalf.com>> wrote: >>=20 >> Hi Andrew, >>=20 >>=20 >>=20 >> 2018-01-12 15:01 GMT+01:00 Andrew Turner <andrew@freebsd.org = <mailto:andrew@freebsd.org>>: >>> Author: andrew >>> Date: Fri Jan 12 14:01:38 2018 >>> New Revision: 327876 >>> URL: https://svnweb.freebsd.org/changeset/base/327876 = <https://svnweb.freebsd.org/changeset/base/327876>; >>>=20 >>> Log: >>> Workaround Spectre Variant 2 on arm64. >>>=20 >>> We need to handle two cases: >>>=20 >>> 1. One process attacking another process. >>> 2. A process attacking the kernel. >>>=20 >>> For the first case we clear the branch predictor state on context = switch >>> between different processes. For the second we do this when taking = an >>> instruction abort on a non-userspace address. >>>=20 >>> To clear the branch predictor state a per-CPU function pointer has = been >>> added. This is set by the new cpu errata code based on if the CPU = is >>> known to be affected. >>>=20 >>> On Cortex-A57, A72, A73, and A75 we call into the PSCI firmware as = newer >>> versions of this will clear the branch predictor state for us. >>>=20 >>> It has been reported the ThunderX is unaffected, however the = ThunderX2 is >>> vulnerable. The Qualcomm Falkor core is also affected. As FreeBSD = doesn't >>> yet run on the ThunderX2 or Falkor no workaround is included for = these CPUs. >>=20 >> Regardless ThunderX2 / Falkor work-arounds, do I understand correctly >> that pure CA72 machines, such as Marvell Armada 7k/8k are immune to >> Variant 2 now? >=20 > It is my understanding that the A72 will be immune with this patch and = an updated Arm Trusted Firmware as documented in [1]. >=20 > Andrew >=20 > [1] = https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firm= ware-Security-Advisory-TFV-6 = <https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Fir= mware-Security-Advisory-TFV-6> >=20 > Are you also working on aarch32 mitigation? No. I think a similar technique could be used, however as aarch32 has = instructions to invalidate the branch predictor these can be used = directly. Andrew=
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