Date: Sun, 2 Jun 2024 21:01:47 +0000 From: Colin Percival <cperciva@tarsnap.com> To: Jessica Clarke <jrtc27@FreeBSD.org>, src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: Re: git: 28aaa58fa64e - main - fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence Message-ID: <0100018fdac2227f-f93f315e-cd78-45f4-aefb-8b334ea3da3e-000000@email.amazonses.com> In-Reply-To: <202406022043.452Khmjb050139@gitrepo.freebsd.org> References: <202406022043.452Khmjb050139@gitrepo.freebsd.org>
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On 6/2/24 13:43, Jessica Clarke wrote: > fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence > > DELAY takes microseconds not milliseconds, so 100 was too low. Moreover, > when enabling hw.pci.clear_pcib, PCI emeration would still stop at one > of the first bridges, but by asserting PERST for the rest of the reset > sequence that appears to be reliably addressed. Does this need to be a DELAY as opposed to something asynchronous? We try to avoid lengthy DELAYs in the boot process. -- Colin Percival FreeBSD Release Engineering Lead & EC2 platform maintainer Founder, Tarsnap | www.tarsnap.com | Online backups for the truly paranoid
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