Date: Fri, 13 Dec 2013 22:51:09 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r259360 - stable/10/sys/arm/freescale/imx Message-ID: <201312132251.rBDMp9DF062293@svn.freebsd.org>
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Author: ian Date: Fri Dec 13 22:51:09 2013 New Revision: 259360 URL: http://svnweb.freebsd.org/changeset/base/259360 Log: MFC r257595: Comments and style(9) only, no functional changes. Modified: stable/10/sys/arm/freescale/imx/imx_machdep.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/freescale/imx/imx_machdep.c ============================================================================== --- stable/10/sys/arm/freescale/imx/imx_machdep.c Fri Dec 13 22:50:12 2013 (r259359) +++ stable/10/sys/arm/freescale/imx/imx_machdep.c Fri Dec 13 22:51:09 2013 (r259360) @@ -158,34 +158,33 @@ bus_dma_get_range_nb(void) return (0); } +/* + * This code which manipulates the watchdog hardware is here to implement + * cpu_reset() because the watchdog is the only way for software to reset the + * chip. Why here and not in imx_wdog.c? Because there's no requirement that + * the watchdog driver be compiled in, but it's nice to be able to reboot even + * if it's not. + */ void imx_wdog_cpu_reset(vm_offset_t wdcr_physaddr) { + const struct pmap_devmap *pd; + volatile uint16_t * pcr; /* - * This code which manipulates the watchdog hardware is here to - * implement cpu_reset() because the watchdog is the only way for - * software to reset the chip. Why here and not in imx_wdog.c? Because - * there's no requirement that the watchdog driver be compiled in, but - * it's nice to be able to reboot even if it's not. + * The deceptively simple write of WDOG_CR_WDE enables the watchdog, + * sets the timeout to its minimum value (half a second), and also + * clears the SRS bit which results in the SFTW (software-requested + * reset) bit being set in the watchdog status register after the reset. + * This is how software can distinguish a reset from a wdog timeout. */ - volatile uint16_t * pcr; - const struct pmap_devmap *pd; - if ((pd = pmap_devmap_find_pa(wdcr_physaddr, 2)) == NULL) { printf("cpu_reset() can't find its control register... locking up now."); } else { pcr = (uint16_t *)(pd->pd_va + (wdcr_physaddr - pd->pd_pa)); - /* - * This deceptively simple write enables the watchdog, sets the timeout - * to its minimum value (half a second), and also clears the SRS bit - * which results in the SFTW (software-requested reset) bit being set in - * the watchdog status register after the reset. This is how software - * can distinguish a requested reset from a wdog timeout. - */ *pcr = WDOG_CR_WDE; } - while (1) + for (;;) continue; }
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