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Date:      Thu, 8 Aug 2019 02:04:29 +0000 (UTC)
From:      Alexander Motin <mav@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org
Subject:   svn commit: r350719 - in stable/12/sys: cam/nvme dev/nvme
Message-ID:  <201908080204.x7824T1J025770@repo.freebsd.org>
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Author: mav
Date: Thu Aug  8 02:04:29 2019
New Revision: 350719
URL: https://svnweb.freebsd.org/changeset/base/350719

Log:
  MFC r348786 (by chuck): Fix nda(4) PCIe link status output
  
  Differentiate between PCI Express Endpoint devices and Root Complex
  Integrated Endpoints in the nda driver. The Link Status and Capability
  registers are not valid for Integrated Endpoints and should not be
  displayed. The bhyve emulated NVMe device will advertise as being an
  Integrated Endpoint.

Modified:
  stable/12/sys/cam/nvme/nvme_xpt.c
  stable/12/sys/dev/nvme/nvme_sim.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/cam/nvme/nvme_xpt.c
==============================================================================
--- stable/12/sys/cam/nvme/nvme_xpt.c	Thu Aug  8 02:02:01 2019	(r350718)
+++ stable/12/sys/cam/nvme/nvme_xpt.c	Thu Aug  8 02:04:29 2019	(r350719)
@@ -722,6 +722,8 @@ nvme_announce_periph(struct cam_periph *periph)
 	struct	ccb_trans_settings cts;
 	struct	cam_path *path = periph->path;
 	struct ccb_trans_settings_nvme	*nvmex;
+	struct sbuf	sb;
+	char		buffer[120];
 
 	cam_periph_assert(periph, MA_OWNED);
 
@@ -736,13 +738,18 @@ nvme_announce_periph(struct cam_periph *periph)
 
 	/* Ask the SIM for its base transfer speed */
 	xpt_path_inq(&cpi, periph->path);
-	printf("%s%d: nvme version %d.%d x%d (max x%d) lanes PCIe Gen%d (max Gen%d) link",
+	sbuf_new(&sb, buffer, sizeof(buffer), SBUF_FIXEDLEN);
+	sbuf_printf(&sb, "%s%d: nvme version %d.%d",
 	    periph->periph_name, periph->unit_number,
 	    NVME_MAJOR(nvmex->spec),
-	    NVME_MINOR(nvmex->spec),
-	    nvmex->lanes, nvmex->max_lanes,
-	    nvmex->speed, nvmex->max_speed);
-	printf("\n");
+	    NVME_MINOR(nvmex->spec));
+	if (nvmex->valid & CTS_NVME_VALID_LINK)
+		sbuf_printf(&sb, " x%d (max x%d) lanes PCIe Gen%d (max Gen%d) link",
+		    nvmex->lanes, nvmex->max_lanes,
+		    nvmex->speed, nvmex->max_speed);
+	sbuf_printf(&sb, "\n");
+	sbuf_finish(&sb);
+	sbuf_putbuf(&sb);
 }
 
 static void

Modified: stable/12/sys/dev/nvme/nvme_sim.c
==============================================================================
--- stable/12/sys/dev/nvme/nvme_sim.c	Thu Aug  8 02:02:01 2019	(r350718)
+++ stable/12/sys/dev/nvme/nvme_sim.c	Thu Aug  8 02:04:29 2019	(r350719)
@@ -212,7 +212,7 @@ nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
 		struct ccb_trans_settings_nvme	*nvmep;
 		struct ccb_trans_settings_nvme	*nvmex;
 		device_t dev;
-		uint32_t status, caps;
+		uint32_t status, caps, flags;
 
 		dev = ctrlr->dev;
 		cts = &ccb->cts;
@@ -221,12 +221,16 @@ nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
 
 		status = pcie_read_config(dev, PCIER_LINK_STA, 2);
 		caps = pcie_read_config(dev, PCIER_LINK_CAP, 2);
-		nvmex->valid = CTS_NVME_VALID_SPEC | CTS_NVME_VALID_LINK;
+		flags = pcie_read_config(dev, PCIER_FLAGS, 2);
 		nvmex->spec = nvme_mmio_read_4(ctrlr, vs);
-		nvmex->speed = status & PCIEM_LINK_STA_SPEED;
-		nvmex->lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
-		nvmex->max_speed = caps & PCIEM_LINK_CAP_MAX_SPEED;
-		nvmex->max_lanes = (caps & PCIEM_LINK_CAP_MAX_WIDTH) >> 4;
+		nvmex->valid = CTS_NVME_VALID_SPEC;
+		if ((flags & PCIEM_FLAGS_TYPE) == PCIEM_TYPE_ENDPOINT) {
+			nvmex->valid |= CTS_NVME_VALID_LINK;
+			nvmex->speed = status & PCIEM_LINK_STA_SPEED;
+			nvmex->lanes = (status & PCIEM_LINK_STA_WIDTH) >> 4;
+			nvmex->max_speed = caps & PCIEM_LINK_CAP_MAX_SPEED;
+			nvmex->max_lanes = (caps & PCIEM_LINK_CAP_MAX_WIDTH) >> 4;
+		}
 
 		/* XXX these should be something else maybe ? */
 		nvmep->valid = 1;

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